HD64F2378RVFQ33 Renesas Electronics America, HD64F2378RVFQ33 Datasheet - Page 230

• Manufacturer Part Number: HD64F2378RVFQ33
• Description: IC H8S MCU FLASH 512K 144-LQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2378RVFQ33

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 33MHz
• Connectivity: I²C, IrDA, SCI, SmartCard
• Peripherals: DMA, POR, PWM, WDT
• Number Of I /o: 97
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b; D/A 6x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 144-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 2 Instruction Descriptions
2.2.59 (5)
SHLL (SHift Logical Left)
Operation
ERd (left logical shift)
Assembly-Language Format
SHLL.L ERd
Operand Size
Longword
Description
This instruction shifts the bits in a 32-bit register ERd (destination operand) one bit to the left. The
most significant bit (bit 31) shifts into the carry flag. The least significant bit (bit 0) is cleared to 0.
Available Registers
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Notes
The SHLL instruction differs from the SHAL instruction in its effect on the overflow flag.
Rev. 4.00 Feb 24, 2006 page 214 of 322
REJ09B0139-0400
Register direct
Addressing
Mode
SHLL (L)
Mnemonic
SHLL.L
C
ERd
MSB
b31
Operands
ERd
. . . . . .
1st byte
1
0
Condition Code
H: Previous value remains unchanged.
N: Set to 1 if the result is negative; otherwise
Z: Set to 1 if the result is zero; otherwise
V: Always cleared to 0.
C: Receives the previous value in bit 31.
2nd byte
3
Instruction Format
cleared to 0.
cleared to 0.
—
I
0 erd
UI H
—
—
3rd byte
LSB
b0
—
U
N
0
4th byte
Z
Shift Logical
V
0
States
No. of
C
1