C8051F127 Silicon Laboratories Inc, C8051F127 Datasheet - Page 299
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C8051F127
Manufacturer Part Number
C8051F127
Description
IC 8051 MCU 128K FLASH 64TQFP
Manufacturer
Silicon Laboratories Inc
Series
C8051F12xr
Specifications of C8051F127
Core Processor
8051
Core Size
8-Bit
Speed
50MHz
Connectivity
EBI/EMI, SMBus (2-Wire/I²C), SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
Number Of I /o
32
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x8b, 8x10b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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22. UART1
UART1 is an asynchronous, full duplex serial port offering modes 1 and 3 of the standard 8051 UART.
Enhanced baud rate support allows a wide range of clock sources to generate standard baud rates (details
in
UART1 to start reception of a second incoming data byte before software has finished reading the previous
data byte.
UART1 has two associated SFRs: Serial Control Register 1 (SCON1) and Serial Data Buffer 1 (SBUF1).
The single SBUF1 location provides access to both transmit and receive registers. Reading SBUF1
accesses the buffered Receive register; writing SBUF1 accesses the Transmit register.
With UART1 interrupts enabled, an interrupt is generated each time a transmit is completed (TI1 is set in
SCON1), or a data byte has been received (RI1 is set in SCON1). The UART1 interrupt flags are not
cleared by hardware when the CPU vectors to the interrupt service routine. They must be cleared manually
by software, allowing software to determine the cause of the UART1 interrupt (transmit complete or receive
complete).
Section “22.1. Enhanced Baud Rate Generation” on page 300
Rate Generator
UART1 Baud
Write to
SBUF1
Figure 22.1. UART1 Block Diagram
Rx Clock
Tx Clock
Stop Bit
Start
Start
SBUF1
Read
SCON1
TB81
D
SET
CLR
Shift
Input Shift Register
Q
Shift
SFR Bus
(RX Latch)
SBUF1
Tx Control
Rx Control
(9 bits)
0x1FF
SFR Bus
Zero Detector
(TX Shift)
SBUF1
RB81
Rev. 1.4
Load SBUF1
Rx IRQ
Tx IRQ
TI1
RI1
SBUF1
C8051F120/1/2/3/4/5/6/7
Load
Send
Data
Interrupt
Serial
Port
RX1
TX1
C8051F130/1/2/3
). Received data buffering allows
Crossbar
Crossbar
Port I/O
299
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