C8051F019 Silicon Laboratories Inc, C8051F019 Datasheet - Page 93

• Manufacturer Part Number: C8051F019
• Description: IC 8051 MCU 16K FLASH 48TQFP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F018r

Specifications of C8051F019

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, Temp Sensor, WDT
• Number Of I /o: 16
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.25K x 8
• Voltage - Supply (vcc/vdd): 2.8 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-TQFP, 48-VQFP
• Data Bus Width: 8 bit
• Data Ram Size: 1.25 KB
• Interface Type: I2C, SMBus, SPI, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

93
Bits7-0: P1.[7:0]
Bits7-0: PRT1CF.[7:0]: Output Configuration Bits for P1.7-P1.0 (respectively)
Bit7:
Bit6:
Bit5:
Bit4:
Bits3-0: UNUSED. Read = 0000b, Write = don’t care.
C8051F018
C8051F019
P1.7
R/W
R/W
R/W
Bit7
Bit7
IE7
Bit7
(Write – Output appears on I/O pins per XBR0, XBR1, and XBR2 registers)
0: Logic Low Output.
1: Logic High Output (high-impedance if corresponding PRT1CF.n bit = 0)
(Read – Regardless of XBR0, XBR1, and XBR2 Register settings).
0: P1.n pin is logic low.
1: P1.n pin is logic high.
0: Corresponding P1.n Output mode is Open-Drain.
1: Corresponding P1.n Output mode is Push-Pull.
IE7: External Interrupt 7 Pending Flag.
0: No falling edge detected on P1.7.
1: This flag is set by hardware when a falling edge on P1.7 is detected.
IE6: External Interrupt 6 Pending Flag.
0: No falling edge detected on P1.6.
1: This flag is set by hardware when a falling edge on P1.6 is detected.
IE5: External Interrupt 5 Pending Flag.
0: No falling edge detected on P1.5.
1: This flag is set by hardware when a falling edge on P1.5 is detected.
IE4: External Interrupt 4 Pending Flag.
0: No falling edge detected on P1.4.
1: This flag is set by hardware when a falling edge on P1.4 is detected.
P1.6
R/W
R/W
R/W
Bit6
Bit6
IE6
Bit6
Figure 13.10. PRT1IF: Port1 Interrupt Flag Register
Figure 13.9. PRT1CF: Port1 Configuration Register
P1.5
R/W
R/W
R/W
Bit5
Bit5
Bit5
IE5
Figure 13.8. P1: Port1 Register
P1.4
R/W
R/W
R/W
Bit4
Bit4
IE4
Bit4
Rev. 1.2
P1.3
R/W
R/W
R/W
Bit3
Bit3
Bit3
-
P1.2
R/W
R/W
R/W
Bit2
Bit2
Bit2
-
P1.1
R/W
R/W
R/W
Bit1
Bit1
Bit1
-
(bit addressable)
P1.0
R/W
R/W
R/W
Bit0
Bit0
Bit0
-
0x90
SFR Address:
SFR Address:
SFR Address:
Reset Value
Reset Value
Reset Value
11111111
00000000
00000000
0xAD
0xA5