C8051F302 Silicon Laboratories Inc, C8051F302 Datasheet - Page 98

• Manufacturer Part Number: C8051F302
• Description: IC 8051 MCU 8K FLASH 11MLP
• Manufacturer: Silicon Laboratories Inc
• Series: C8051F30xr

Specifications of C8051F302

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 25MHz
• Connectivity: SMBus (2-Wire/I²C), UART/USART
• Peripherals: POR, PWM, Temp Sensor, WDT
• Number Of I /o: 8
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 11-VQFN
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SMBus, UART
• Maximum Clock Frequency: 25 MHz
• Number Of Programmable I/os: 8
• Number Of Timers: 16 bit
• Operating Supply Voltage: 2.7 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: No

C8051F300/1/2/3/4/5
12.2. Port I/O Initialization
Port I/O initialization consists of the following steps:
All Port pins must be configured as either analog or digital inputs. Any pins to be used as Comparator or ADC inputs
should be configured as an analog inputs. When a pin is configured as an analog input, its weak pull-up, digital driver,
and digital receiver is disabled. This process saves power and reduces noise on the analog input. Pins configured as
digital inputs may still be used by analog peripherals; however this practice is not recommended.
Additionally, all analog input pins should be configured to be skipped by the Crossbar (accomplished by setting the
associated bits in XBR0). Port input mode is set in the P0MDIN register, where a ‘1’ indicates a digital input, and a
‘0’ indicates an analog input. All pins default to digital inputs on reset. See Figure 12.9 for the P0MDIN register
details.
The output driver characteristics of the I/O pins are defined using the Port0 Output Mode register P0MDOUT (see
Figure 12.10). Each Port Output driver can be configured as either open drain or push-pull. This selection is required
even for the digital resources selected in the XBRn registers, and is not automatic. The only exception to this is the
SMBus (SDA, SCL) pins, which are configured as open-drain regardless of the P0MDOUT settings. When the
WEAKPUD bit in XBR2 is ‘0’, a weak pull-up is enabled for all Port I/O configured as open-drain. WEAKPUD does
not affect the push-pull Port I/O. Furthermore, the weak pull-up is turned off on an open-drain output that is driving a
‘0’ to avoid unnecessary power dissipation.
Registers XBR0, XBR1 and XBR2 must be loaded with the appropriate values to select the digital I/O functions
required by the design. Setting the XBARE bit in XBR2 to ‘1’ enables the Crossbar. Until the Crossbar is enabled, the
external pins remain as standard digital inputs (output drivers disabled) regardless of the XBRn Register settings. For
given XBRn Register settings, one can determine the I/O pin-out using the Priority Decode Table; as an alternative,
the Configuration Wizard utility of the Silicon Labs IDE software will determine the Port I/O pin-assignments based
on the XBRn Register settings.
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Step 1. Select the input mode (analog or digital) for all Port pins, using the Port0 Input Mode register
Step 2. Select the output mode (open-drain or push-pull) for all Port pins, using the Port0 Output Mode
Step 3. Set XBR0 to skip any pins selected as analog inputs or special functions.
Step 4. Assign Port pins to desired peripherals.
Step 5. Enable the Crossbar.
(P0MDIN).
register (P0MDOUT).
Rev. 2.3