MC68HC908GR16CFJ Freescale Semiconductor, MC68HC908GR16CFJ Datasheet - Page 42

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MC68HC908GR16CFJ

Manufacturer Part Number
MC68HC908GR16CFJ
Description
IC MCU 16K FLASH 8MHZ SPI 32LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet

Specifications of MC68HC908GR16CFJ

Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
LIN, SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Quantity
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Part Number:
MC68HC908GR16CFJ
Manufacturer:
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Quantity:
10 000
Memory
This program sequence is repeated throughout the memory until all data is programmed.
Do not exceed t
programming time to the same row before next erase. t
Refer to
The time between programming the FLASH address change (step 7 to step 7), or the time between the
last FLASH programmed to clearing the PGM bit (step 7 to step 10) must not exceed the maximum
programming time, t
42
10. Clear the PGM bit.
11. Wait for a time, t
12. Clear the HVEN bit.
13. After time, t
8. Wait for a time, t
9. Repeat step 7 and 8 until all desired bytes within the row are programmed.
t
NVX
= t
20.15 Memory
NVH
The COP register at location $FFFF should not be written between steps
5-12, when the HVEN bit is set. Since this register is located at a valid
FLASH address, unpredictable behavior may occur if this location is written
while HVEN is set.
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t
Memory
It is highly recommended that interrupts be disabled during program/ erase
operations.
Be cautious when programming the FLASH array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm or
the byte to be programmed in step 7 of the algorithm. This applies
particularly to $FFD4–$FFDF.
+ t
PROG
PGS
RCV
PROG
maximum or t
+ (t
(typical 1 μs), the memory can be accessed in read mode again.
PROG
NVH
Characteristics.
Characteristics.
(1)
PROG
maximum.
(minimum 5 μs).
(minimum 30 μs).
x 32) <= t
MC68HC908GR16 Data Sheet, Rev. 5.0
HV
maximum. t
HV
maximum
CAUTION
NOTE
NOTE
HV
is defined as the cumulative high voltage
HV
PROG
must satisfy this condition:
maximum, see
20.15
Freescale Semiconductor

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