COP8SAA7SLB9 National Semiconductor, COP8SAA7SLB9 Datasheet - Page 41
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COP8SAA7SLB9
Manufacturer Part Number
COP8SAA7SLB9
Description
IC MCU OTP 8BIT 1K 28LAMINATECSP
Manufacturer
National Semiconductor
Series
COP8™ 8SAr
Datasheet
1.COP8-PGMA-28CSP.pdf
(60 pages)
Specifications of COP8SAA7SLB9
Core Processor
COP8
Core Size
8-Bit
Speed
10MHz
Connectivity
Microwire/Plus (SPI)
Peripherals
POR, PWM, WDT
Number Of I /o
24
Program Memory Size
1KB (1K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
28-Laminate CSP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Other names
COP8SAA7SLB9TR
13.0 Instruction Set
Example: Load Accumulator Immediate
Immediate Short. This is a special case of an immediate
instruction. In the “Load B immediate” instruction, the 4-bit
immediate value in the instruction is loaded into the lower
nibble of the B register. The upper nibble of the B register is
reset to 0000 binary.
Example: Load B Register Immediate Short
Indirect from Program Memory. This is a special case of
an indirect instruction that allows access to data tables
stored in program memory. In the “Load Accumulator Indi-
rect” (LAID) instruction, the upper and lower bytes of the
Program Counter (PCU and PCL) are used temporarily as a
pointer to program memory. For purposes of accessing pro-
gram memory, the contents of the Accumulator and PCL are
exchanged. The data pointed to by the Program Counter is
loaded into the Accumulator, and simultaneously, the original
contents of PCL are restored so that the program can re-
sume normal execution.
Example: Load Accumulator Indirect
13.3.2 Tranfer-of-Control Addressing Modes
Program instructions are usually executed in sequential or-
der. However, Jump instructions can be used to change the
normal execution sequence. Several transfer-of-control ad-
dressing modes are available to specify jump addresses.
A change in program flow requires a non-incremental
change in the Program Counter contents. The Program
Counter consists of two bytes, designated the upper byte
(PCU) and lower byte (PCL). The most significant bit of PCU
is not used, leaving 15 bits to address the program memory.
Different addressing modes are used to specify the new
address for the Program Counter. The choice of addressing
mode depends primarily on the distance of the jump. Farther
jumps sometimes require more instruction bytes in order to
completely specify the new Program Counter contents.
LD A, # 05
LD B, # 7
LAID
Memory Location
Accumulator
041F Hex
Reg/Data
Accumulator
Memory
Reg/Data
Memory
Reg/Data
B Pointer
PCU
PCL
Memory
(Continued)
Contents
Contents
Contents
XX Hex
12 Hex
04 Hex
35 Hex
1F Hex
25 Hex
Before
Before
Before
Contents
Contents
Contents
05 Hex
07 Hex
04 Hex
36 Hex
25 Hex
25 Hex
After
After
After
41
The available transfer-of-control addressing modes are:
The transfer-of-control addressing modes are described be-
low. Each description includes an example of a Jump in-
struction using a particular addressing mode, and the effect
on the Program Counter bytes of executing that instruction.
Jump Relative. In this 1-byte instruction, six bits of the
instruction opcode specify the distance of the jump from the
current program memory location. The distance of the jump
can range from −31 to +32. A JP+1 instruction is not allowed.
The programmer should use a NOP instead.
Example: Jump Relative
Jump Absolute. In this 2-byte instruction, 12 bits of the
instruction opcode specify the new contents of the Program
Counter. The upper three bits of the Program Counter re-
main unchanged, restricting the new Program Counter ad-
dress to the same 4 kbyte address space as the current
instruction.
(This restriction is relevant only in devices using more than
one 4 kbyte program memory space.)
Example: Jump Absolute
Jump Absolute Long. In this 3-byte instruction, 15 bits of
the instruction opcode specify the new contents of the Pro-
gram Counter.
Example: Jump Absolute Long
• Jump Relative
• Jump Absolute
• Jump Absolute Long
• Jump Indirect
JP 0A
JMP 0125
JMP 03625
Memory
Reg/
PCU
PCL
PCU
PCU
Reg
PCL
Reg
PCL
Contents
Contents
Contents
0C Hex
Before
02 Hex
05 Hex
Before
77 Hex
Before
42 Hex
36 Hex
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Contents
Contents
Contents
02 Hex
0F Hex
01 Hex
25 Hex
36 Hex
25 Hex
After
After
After