MC68HRC908JK3CP Freescale Semiconductor, MC68HRC908JK3CP Datasheet - Page 142

• Manufacturer Part Number: MC68HRC908JK3CP
• Description: IC MCU FLASH 8B 8MHZ RC 4K 20DIP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC68HRC908JK3CP

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 15
• Program Memory Size: 4KB (4K x 8)
• Program Memory Type: FLASH
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.3 V
• Data Converters: A/D 12x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-DIP (0.300", 7.62mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Connectivity: -

Analog-to-Digital Converter (ADC)
11.4.2 Voltage Conversion
11.4.3 Conversion Time
11.4.4 Continuous Conversion
Technical Data
140
NOTE:
Writes to the port register or DDR will not have any affect on the port pin
that is selected by the ADC. Read of a port pin which is in use by the
ADC will return a logic 0 if the corresponding DDR bit is at logic 0. If the
DDR bit is at logic 1, the value in the port data latch is read.
When the input voltage to the ADC equals V
signal to $FF (full scale). If the input voltage equals V
converts it to $00. Input voltages between V
straight-line linear conversion. All other input voltages will result in $FF
if greater than V
Input voltage should not exceed the analog supply voltages.
Sixteen ADC internal clocks are required to perform one conversion. The
ADC starts a conversion on the first rising edge of the ADC internal clock
immediately following a write to the ADSCR. If the ADC internal clock is
selected to run at 1MHz, then one conversion will take 16µs to complete.
With a 1MHz ADC internal clock the maximum sample rate is 62.5kHz.
In the continuous conversion mode, the ADC continuously converts the
selected channel filling the ADC data register with new data after each
conversion. Data from the previous conversion will be overwritten
whether that data has been read or not. Conversions will continue until
the ADCO bit is cleared. The COCO bit (ADC Status & Control register,
$003C) is set after each conversion and can be cleared by writing the
ADC status and control register or reading of the ADC data register.
Number of Bus Cycles = Conversion Time × Bus Frequency
Analog-to-Digital Converter (ADC)
Conversion Time =
DD
and $00 if less than V
ADC Clock Frequency
16 ADC Clock Cycles
SS
.
DD
DD
MC68H(R)C908JL3
, the ADC converts the
and V
Freescale Semiconductor
SS
SS,
are a
the ADC
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Rev. 1.1