MC68HC11F1CFN2 Freescale Semiconductor, MC68HC11F1CFN2 Datasheet - Page 114

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MC68HC11F1CFN2

Manufacturer Part Number
MC68HC11F1CFN2
Description
IC MCU 512 EEPROM 2MHZ 68-PLCC
Manufacturer
Freescale Semiconductor
Series
HC11r
Datasheets

Specifications of MC68HC11F1CFN2

Core Processor
HC11
Core Size
8-Bit
Speed
2MHz
Connectivity
SCI, SPI
Peripherals
POR, WDT
Number Of I /o
30
Program Memory Type
ROMless
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.75 V ~ 5.25 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
68-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Program Memory Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC68HC11F1CFN2
Manufacturer:
MOT
Quantity:
90
Part Number:
MC68HC11F1CFN2
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
TOC1–TOC4 — Timer Output Compare
9.3.2 Timer Compare Force Register
CFORC — Timer Compare Force
FOC[1:5] — Force Output Comparison
Bits [2:0] — Not implemented
9.3.3 Output Compare Mask Registers
9-8
$101C
$101D
$101A
$101B
$1016
$1017
$1018
$1019
RESET:
All TOCx register pairs reset to ones ($FFFF).
The CFORC register allows forced early compares. FOC[1:5] correspond to the five
output compares. These bits are set for each output compare that is to be forced. The
action taken as a result of a forced compare is the same as if there were a match be-
tween the OCx register and the free-running counter, except that the corresponding
interrupt status flag bits are not set. The forced channels trigger their programmed pin
actions to occur at the next timer count transition after the write to CFORC.
The CFORC bits should not be used on an output compare function that is pro-
grammed to toggle its output on a successful compare because a normal compare that
occurs immediately before or after the force can result in an undesirable operation.
When the FOC bit associated with an output compare circuit is set, the output compare
circuit immediately performs the action it is programmed to do when an output match
occurs.
Always read zero
Use OC1M with OC1 to specify the bits of port A that are affected by a successful OC1
compare. The bits of the OC1M register correspond to PA[7:3].
0 = Not affected
1 = Output x action occurs
Bit 15
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
Bit 7
FOC1
Bit 7
0
14
14
14
14
6
6
6
6
FOC2
6
0
Freescale Semiconductor, Inc.
For More Information On This Product,
13
13
13
13
5
5
5
5
FOC3
5
0
Go to: www.freescale.com
12
12
12
12
4
4
4
4
TIMING SYSTEM
FOC4
4
0
11
11
11
11
3
3
3
3
FOC5
0
3
10
10
10
10
2
2
2
2
2
0
9
1
9
1
9
1
9
1
1
0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
TECHNICAL DATA
Bit 0
$1016–$101D
0
MC68HC11F1
TOC1 (High)
TOC1 (Low)
TOC2 (High)
TOC2 (Low)
TOC3 (High)
TOC3 (Low)
TOC4 (High)
TOC4 (Low)
$100B

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