MC68HC11F1CFN2 Freescale Semiconductor, MC68HC11F1CFN2 Datasheet - Page 47

• Manufacturer Part Number: MC68HC11F1CFN2
• Description: IC MCU 512 EEPROM 2MHZ 68-PLCC
• Manufacturer: Freescale Semiconductor
• Series: HC11r

Specifications of MC68HC11F1CFN2

• Core Processor: HC11
• Core Size: 8-Bit
• Speed: 2MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 30
• Program Memory Type: ROMless
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 4.75 V ~ 5.25 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 68-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Program Memory Size: -

RWU — Receiver Wake Up Control
SBK — Send Break
SCSR — SCI Status Register
TDRE — Transmit Data Register Empty Flag
TC — Transmit Complete Flag
RDRF — Receive Data Register Full Flag
IDLE — Idle Line Detected Flag
OR — Overrun Error Flag
NF — Noise Error Flag
FE — Framing Error
MC68HC11F1/FC0
MC68HC11FTS/D
RESET:
This flag is set when SCDR is empty. Clear the TDRE flag by reading SCSR with TDRE set and then
writing to SCDR.
This flag is set when the transmitter is idle (no data, preamble, or break transmission in progress). Clear
the TC flag by reading SCSR with TC set and then writing to SCDR.
This flag is set if a received character is ready to be read from SCDR. Clear the RDRF flag by reading
SCSR with RDRF set and then reading SCDR.
This flag is set if the RxD line is idle. Once cleared, IDLE is not set again until the RxD line has been
active and becomes idle again. The IDLE flag is inhibited when RWU = 1. Clear IDLE by reading SCSR
with IDLE set and then reading SCDR.
OR is set if a new character is received before a previously received character is read from SCDR. Clear
OR by reading SCSR with OR set and then reading SCDR.
NF is set if majority sample logic detects anything other than a unanimous decision. Clear NF by reading
SCSR with NF set and then reading SCDR.
FE is set when a zero is detected where a stop bit was expected. Clear the FE flag by reading SCSR
with FE set and then reading SCDR.
0 = Normal SCI receiver
1 = Wake up enabled and receiver interrupt inhibited
0 = Break generator off
1 = Break codes generated as long as SBK = 1
0 = SCDR is busy
1 = SCDR is empty
0 = Transmitter is busy
1 = Transmitter is idle
0 = SCDR empty
1 = SCDR full
0 = RxD line is active
1 = RxD line is idle
0 = No overrun detected
1 = Overrun detected
0 = Unanimous decision
1 = Noise detected
0 = Stop bit detected
1 = Zero detected
TDRE
Bit 7
1
TC
6
1
Freescale Semiconductor, Inc.
For More Information On This Product,
RDRF
5
0
Go to: www.freescale.com
IDLE
4
0
OR
3
0
NF
2
0
FE
1
0
Bit 0
0
0
$x02E
47