MC68HC705C9ACP Freescale Semiconductor, MC68HC705C9ACP Datasheet - Page 31

• Manufacturer Part Number: MC68HC705C9ACP
• Description: IC MCU 2.1MHZ 16K OTP 40-DIP
• Manufacturer: Freescale Semiconductor
• Series: HC05r

Specifications of MC68HC705C9ACP

• Core Processor: HC05
• Core Size: 8-Bit
• Speed: 2.1MHz
• Connectivity: SCI, SPI
• Peripherals: POR, WDT
• Number Of I /o: 24
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 352 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

Freescale Semiconductor
$000D
$000E
$000F
$0010
$0011
$0012
$0013
$0014
$0015
$0016
$0017
$0018
Addr.
Input Capture Register High
Input Capture Register Low
Output Compare Register
Output Compare Register
Register Name
SCI Baud Rate Register
Timer Control Register
SCI Control Register 1
SCI Control Register 2
Timer Status Register
Timer Register High
SCI Status Register
SCI Data Register
See page 69.
See page 65.
See page 66.
See page 68.
See page 65.
See page 53.
See page 54.
See page 56.
See page 56.
High (OCRH)
See page 56.
See page 56.
See page 55.
Low (OCRL)
(SCCR1)
(SCCR2)
Figure 2-4. Input/Output Registers (Sheet 2 of 3)
(SCDR)
(SCSR)
(ICRH)
(ICRL)
BAUD
(TCR)
(TSR)
(TRH)
MC68HC05C9A Advance Information Data Sheet, Rev. 4.1
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
TDRE
SCD7
Bit 15
Bit 15
Bit 15
Bit 7
Bit 7
Bit 7
ICIE
TIE
ICF
R8
—
U
U
0
1
0
1
= Unimplemented
SDC6
OCIE
Bit 14
Bit 14
Bit 14
TCIE
OCF
Bit 6
Bit 6
T8
TC
—
U
U
6
0
1
0
1
SCP1
RDRF
SCD5
Bit 13
Bit 13
Bit 13
TOIE
TOF
Bit 5
Bit 5
RIE
U
5
0
0
0
0
0
1
SCD4
SCP0
Bit 12
Bit 12
Bit 12
IDLE
Bit 4
Bit 4
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
Unaffected by reset
ILIE
M
U
R
4
0
0
0
0
0
0
0
1
= Reserved
WAKE
SCD3
Bit 11
Bit 11
Bit 11
Bit 3
Bit 3
OR
TE
—
U
3
0
0
0
0
0
0
1
SCR2
SCD2
Bit 10
Bit 10
Bit 10
Bit 2
Bit 2
RE
NF
U
2
0
0
0
0
0
0
0
1
U = Unaffected
SCR1
SCD1
RWU
IEDG
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
FE
U
U
1
0
0
0
0
0
1
I/O Registers
SCR0
SCD0
OLVL
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
SBK
—
U
0
0
0
0
0
1
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