N87C511SF76 Intel, N87C511SF76 Datasheet - Page 18

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N87C511SF76

Manufacturer Part Number
N87C511SF76
Description
IC MCU 8BIT 5V 16MHZ OTP 44PLCC
Manufacturer
Intel
Series
87Cr
Datasheet

Specifications of N87C511SF76

Rohs Status
RoHS non-compliant
Core Processor
MCS 51
Core Size
8-Bit
Speed
16MHz
Connectivity
SIO
Number Of I /o
32
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Eeprom Size
-
Data Converters
-
Peripherals
-
Other names
810977

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
N87C511SF76
Manufacturer:
Intel
Quantity:
10 000
87C51/80C51BH/80C31BH
PROGRAMMING ALGORITHM
Refer to Table 4 and Figures 10 and 11 for address,
data, and control signals set up. To program the
87C51 the following sequence must be exercised.
1. Input the valid address on the address lines.
2. Input the appropriate data byte on the data lines.
3. Activate the correct combination of control sig-
4. Raise EA/V
5. Pulse ALE/PROG 5 times for the EPROM array,
Repeat 1 through 5 changing the address and data
for the entire array or until the end of the object file is
reached.
Program Verify
Verification may be done after programming either
one byte or a block of bytes. In either case a com-
plete verify of the array will ensure reliable program-
ming of the 87C51.
The lock bits cannot be directly verified. Verification
of the lock bits is done by observing that their fea-
tures are enabled.
ROM and EPROM Lock System
The program lock system, when programmed, pro-
tects the onboard program against software piracy.
18
nals.
and 25 times for the encryption table and the lock
bits.
For compatibility, 25 pulses may be used.
PP
from V
CC
to 12.75V
Figure 11. Programming Waveforms
g
0.25V.
The 80C51BH has a one level program lock system
and a 64-byte encryption table. If program protection
is desired, the user submits the encryption table with
their code and both the lock bit and encryption array
are programmed by the factory. The encryption array
is not available without the lock bit. For the lock bit
to be programmed, the user must submit an encryp-
tion table. The 87C51 has a 3-level program lock
system and a 64-byte encryption array. Since this is
an EPROM device, all locations are user-program-
mable. See Table 5.
Encryption Array
Within the EPROM array are 64 bytes of Encryption
Array that are initially unprogrammed (all 1's). Every
time that a byte is addressed during a verify, 6 ad-
dress lines are used to select a byte of the Encryp-
tion Array. This byte is then exclusive-NOR'ed
(XNOR) with the code byte, creating an Encryption
Verify byte. The algorithm, with the array in the un-
programmed state (all 1's), will return the code in its
original, unmodified form. For programming the En-
cryption Array, refer to Table 4 (Programming the
EPROM).
When using the encryption array, one important fac-
tor needs to be considered. lf a code byte has the
value 0FFH, verifying the byte will produce the en-
cryption byte value. lf a large block (
code is left unprogrammed, a verification routine will
display the contents of the encryption array. For this
reason all unused code bytes should be pro-
grammed with some value other than 0FFH, and not
all of them the same value. This will ensure maxi-
mum program protection.
l
64 bytes) of
272335 ±22

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