Z8F012AHH020SG Zilog, Z8F012AHH020SG Datasheet - Page 36

IC ENCORE XP MCU FLASH 1K 20SSOP

Z8F012AHH020SG

Manufacturer Part Number
Z8F012AHH020SG
Description
IC ENCORE XP MCU FLASH 1K 20SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F012AHH020SG

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
17
Program Memory Size
1KB (1K x 8)
Program Memory Type
FLASH
Eeprom Size
16 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 7x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4029
Z8F012AHH020SG
Reset Sources
Table 9. Reset Sources and Resulting Reset Type
PS022825-0908
Operating Mode
NORMAL or HALT
modes
STOP mode
Power-On Reset
Table 9
Z8 Encore! XP F082A Series devices contain an internal Power-On Reset
circuit. The POR circuit monitors the supply voltage and holds the device in the Reset
state until the supply voltage reaches a safe operating level. After the supply voltage
exceeds the POR voltage threshold (V
POR Counter has timed out. If the crystal oscillator is enabled by the option bits, this
timeout is longer.
After the Z8 Encore! XP F082A Series device exits the Power-On Reset state, the eZ8
CPU fetches the Reset vector. Following Power-On Reset, the POR status bit in the Reset
Status (RSTSTAT) register is set to 1.
Figure 5
for the POR threshold voltage (V
Reset Source
Power-On Reset/Voltage
Brownout
Watchdog Timer time-out
when configured for Reset
RESET pin assertion
On-Chip Debugger initiated Reset
(OCDCTL[0] set to 1)
Power-On Reset/Voltage
Brownout
RESET pin assertion
DBG pin driven Low
lists the possible sources of a system reset.
displays Power-On Reset operation. See
POR
).
POR
Reset, Stop Mode Recovery, and Low Voltage Detection
), the device is held in the Reset state until the
Special Conditions
All reset pulses less than three system clocks
All reset pulses less than the specified analog
Reset delay begins after supply voltage
exceeds POR level.
None.
in width are ignored.
System Reset, except the On-Chip Debugger
is unaffected by the reset.
Reset delay begins after supply voltage
exceeds POR level.
delay are ignored. See
page
None.
229.
Electrical Characteristics
Z8 Encore! XP
Product Specification
Table 131
®
F082A Series
on page 221
on
25

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