Z8F042AHJ020EC00TR Zilog, Z8F042AHJ020EC00TR Datasheet - Page 3

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Z8F042AHJ020EC00TR

Manufacturer Part Number
Z8F042AHJ020EC00TR
Description
IC ENCORE XP MCU FLASH 4K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheets

Specifications of Z8F042AHJ020EC00TR

Core Processor
Z8
Core Size
8-Bit
Speed
20MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, LVD, POR, PWM, Temp Sensor, WDT
Number Of I /o
23
Program Memory Size
4KB (4K x 8)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
Z8F042AHJ020EC00T
Table 2. Z8 Encore! XP
UP006912-0308
Sl
No. Summary
6
7
8
9
10
11
12
PA2 will not output a
strong high.
VBO/POR
Hysteresis is greater
than specified in the
product
specification.
ADC differential
mode calibration
data.
WDT Default
Timeout Period
longer than
specified.
IPO current
consumption higher
than typically
specified.
Slow Vdd ramp can
hang the device.
ADC Calibration
Data Error.
Later (Continued)
®
Description
The PMOS output device of the PA2 port is disabled. The PA2 port will not out-
put a high level unless the internal pull-up resistor is enabled. This pull-up
resistor is enabled by default but it should not be turned off unless the port is
pulled up externally. Because there is no active drive high, the PA2 port will
only produce slow rising edges.
Workaround
If a fast rising edge response time is required, use another GPIO port.
The hysteresis has been measured to be around 100 mV.
Workaround
None.
The ADC calibration data stored in the info block will cause significant error for
negative input values on the ADC. This is a production test/calibration issue.
Workaround
All devices with date code 0519 or greater have separate calibration data for
the negative input values. See the product specification for details.
In the product specification the default timeout period is 100 ms. However, for
this version of silicon, the default is equal to the maximum timeout value.
Workaround
Manually set the WDT timeout to the desired value.
When the IPO is enabled, the product specification gives a typical current
consumption of 300 µA. The consumption for these date codes is typically
1.5 mA.
Workaround
None.
When the power supply voltage takes longer than 20 ms to ramp, the device
will sometime fail to exit reset.
Workaround
Speed up the V
The calibration data stored in the XP device's information page has a negative
slope error. Compensated values may be up to 30 LSBs lower than expected
in the ADC modes using an internal reference. External reference calibration
data is not affected.
Workaround
Re-calibrate parts in final target board.
F082A Series Errata (8-pin Devices) with Date Codes 0439 and
dd
ramp.
Errata for Z8 Encore! XP
®
F082A Series
Page 3 of 14

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