Z8F4801AN020SC Zilog, Z8F4801AN020SC Datasheet - Page 8

• Manufacturer Part Number: Z8F4801AN020SC
• Description: IC ENCORE MCU FLASH 48K 44-LQFP
• Manufacturer: Zilog
• Series: Encore!®r

Specifications of Z8F4801AN020SC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 31
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Other names: 269-3142

Table 2. Z8F640x, Z8F480x, Z8F320x, Z8F240x, Z8F160x Errata for Devices with Date
UP004207-0308
Sl
No
4
5
Summary
UART Overrun
errors may be
missed.
Interrupts can be
lost if received by
the interrupt
controller at the
same time as a write
to the correspond-
ing IRQ register.
Codes 0239 and Later (Continued)
Errata to Z8F640x, Z8F480x, Z8F320x, Z8F240x, Z8F160x (Z8 Encore!
Description
Framing Error, Parity Error, Break Detect, and Rx Overrun Error conditions are
cleared up on reading the UART Receive Data register. During the time
between reading the UART Status register and the UART Receive Data regis-
ter, it is possible for another character to be received. This causes all UART
error flags and the UART Receive Data register to be updated with the new
character. Thus making it is possible to miss the Overrun Error.
The window for this error to occur is very small. It can only occur if a UART
Overrun Error occurs between the time the UART Status register is read and
the UART Receive Data register is read. If vectored interrupts are used, the
UART should be serviced in a timely fashion and Receiver Overrun conditions
should not occur.
If you have long ISR (bad coding style) or are polling the UART instead of
using vectored interrupts, Overrun errors become more likely. The window for
this problem to occur is still small, yet becomes more probable if UART
Receiver Overrun conditions occur frequently.
Workaround
When the user code employs vectored interrupts for the UART and does not
have long ISR, this is not a problem. Even for long ISR, the problem can be
avoided by,
•
•
Incoming interrupts can be lost if received by the interrupt controller at the
same time as a write to the corresponding IRQ register.
Workaround
Clear the Continuous Assertion interrupts using a two-step interrupt service
process. In the ISR, first check if the interrupt source (for example, the UART)
really has a pending interrupt. If yes:
•
•
•
•
After this first pass through the ISR, the IRQ register bit will still be set to 1.
This will cause the interrupt to occur again. When the Encore vectors to the
interrupt, check if the interrupt source (for example, the UART) really has a
pending interrupt. If there are no pending interrupts, immediately execute a
return from the ISR.
Nesting the ISR
Adjusting the interrupt masks and re-enabling interrupts
Process the interrupt as usual.
Clear the interrupt at the source (for example, at the UART).
Do not clear the IRQ register bit (this would make it possible to miss
another incoming interrupt).
Execute a return from the ISR.
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