Z86E4412VSC Zilog, Z86E4412VSC Datasheet - Page 34

• Manufacturer Part Number: Z86E4412VSC
• Description: IC MICROCONTROLLER 16K 44-PLCC
• Manufacturer: Zilog
• Series: Z8®r

Specifications of Z86E4412VSC

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 12MHz
• Connectivity: EBI/EMI
• Peripherals: POR, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 236 x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-LCC (J-Lead)
• For Use With: 309-1042 - ADAPTER 44-PLCC ZIF TO 44-PLCC309-1041 - ADAPTER 44-PLCC TO 44-PLCC
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-1046

Table 14. DC Electrical Characteristics T
PS022901-0508
No.
10
11
12
13
14
15
16
17
18
19
Notes
1. The V
2. Timing numbers given are for minimum TpC.
3. When using extended memory timing, add 2 TpC.
Standard Test Load
All timing references use 0.7 V
For Standard Mode (not Low-EMI Mode for outputs) with SMR, D1 = 0, D0 = 0.
guarantees only 3.5 V.
Symbol
TdDS(A)
TdDS(AS)
TdR/W(AS)
TdDS(R/W)
TdDW(DSW) Write Data Valid to DS Fall (Write)
TdDS(DW)
TdA(DR)
TdAS(DS)
TdDM(AS)
ThDS(AS)
CC
voltage specification of 5.5 V guarantees 5.0 V ± 0.5 V and the V
Parameter
DS Rise to Address Active
Delay
DS Rise to AS Fall Delay
R/W Valid to AS Rise Delay
DS Rise to R/W Not Valid
Delay
DS Rise to Write Data Not Valid
Delay
Address Valid to Read Data Req’d
Valid
AS Rise to DS Fall Delay
DM Valid to AS Rise Delay
DS Valid to Address Valid Hold Time 4.5V
CC
for a logic 1 and 0.2 V
A
= -40 °C to +105 °C, 12 MHz (Continued)
CC
for a logic 0.
V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
4.5V
5.5V
5.5V
CC
1
CMOS Z8
Min
45
55
45
45
45
45
45
45
55
55
55
55
65
65
35
35
35
35
CC
voltage specification of 3.5 V
®
Max
310
310
Product Specification
OTP Microcontrollers
Electrical Characteristics
Units Notes
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2
2
2
2
2
2
2
2
2
2
2
2
2,3
2,3
2
2
2
2
2
2
30