ADUC812BS-REEL Analog Devices Inc, ADUC812BS-REEL Datasheet - Page 35

IC MCU 8K FLASH ADC/DAC 52MQFP

ADUC812BS-REEL

Manufacturer Part Number
ADUC812BS-REEL
Description
IC MCU 8K FLASH ADC/DAC 52MQFP
Manufacturer
Analog Devices Inc
Series
MicroConverter® ADuC8xxr
Datasheet

Specifications of ADUC812BS-REEL

Rohs Status
RoHS non-compliant
Core Processor
8052
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
PSM, Temp Sensor, WDT
Number Of I /o
34
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
640 x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x12b, D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-MQFP, 52-PQFP
UART SERIAL INTERFACE
The serial port is full-duplex, meaning it can transmit and receive
simultaneously. It is also receive-buffered, meaning it can begin
receiving a second byte before a previously received byte has been
read from the receive register. However, if the first byte still has
not been read by the time reception of the second byte is com-
plete, the first byte will be lost. The physical interface to the
serial data network is via Pins RXD(P3.0) and TXD(P3.1)
SCON
SFR Address
Power-On Default Value
Bit Addressable
Bit
7
6
5
4
3
2
1
0
REV. E
S
M
0
Name
SM0
SM1
SM2
REN
TB8
RB8
TI
RI
S
M
1
Control Register
UART Serial Port
98H
00H
Yes
Description
UART Serial Mode Select Bits.
These bits select the Serial Port operating mode as follows:
SM0
0
0
1
1
Multiprocessor Communication Enable Bit.
Enables multiprocessor communication in Modes 2 and 3. In Mode 0, SM2 should be cleared.
In Mode 1, if SM2 is set, RI will not be activated if a valid stop bit was not received. If SM2 is
cleared, RI will be set as soon as the byte of data has been received. In Modes 2 or 3, if SM2 is
set, RI will not be activated if the received ninth data bit in RB8 is 0. If SM2 is cleared, RI will
be set as soon as the byte of data has been received.
Serial Port Receive Enable Bit.
Set by user software to enable serial port reception.
Cleared by user software to disable serial port reception.
Serial Port Transmit (Bit 9).
The data loaded into TB8 will be the ninth data bit that will be transmitted in Modes 2 and 3.
Serial Port Receiver Bit 9.
The ninth data bit received in Modes 2 and 3 is latched into RB8. For Mode 1, the stop bit is
latched into RB8.
Serial Port Transmit Interrupt Flag.
Set by hardware at the end of the eighth bit in Mode 0, or at the beginning of the stop bit in
Modes 1, 2, and 3. TI must be cleared by user software.
Serial Port Receive Interrupt Flag.
Set by hardware at the end of the eighth bit in Mode 0, or halfway through the stop bit in
Modes 1, 2, and 3. RI must be cleared by software.
S
M
2
Table XIX. SCON SFR Bit Designations
SM1
0
1
0
1
R
E
N
Selected Operating Mode
Mode 0: Shift Register, fixed baud rate (Core_Clk/2)
Mode 1: 8-bit UART, variable baud rate
Mode 2: 9-bit UART, fixed baud rate (Core_Clk/64) or (Core_Clk/32)
Mode 3: 9-bit UART, variable baud rate
–35–
while the SFR interface to the UART is comprised of SBUF
and SCON, as described below.
SBUF
The serial port receive and transmit registers are both accessed
through the SBUF SFR (SFR address = 99H). Writing to
SBUF loads the transmit register and reading SBUF accesses a
physically separate receive register.
T
B
8
R
B
8
T
I
ADuC812
R
I

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