ATMEGA328P-PU Atmel, ATMEGA328P-PU Datasheet - Page 96
![MCU AVR 32K FLASH 28-PDIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA328P-PU
Manufacturer Part Number
ATMEGA328P-PU
Description
MCU AVR 32K FLASH 28-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA48A-PU.pdf
(566 pages)
2.ATMEGA48A-PU.pdf
(33 pages)
3.ATMEGA48PA-MMH.pdf
(26 pages)
4.ATMEGA328P-PU.pdf
(567 pages)
Specifications of ATMEGA328P-PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Data Rom Size
1 KB
A/d Bit Size
10 bit
A/d Channels Available
6
Height
4.57 mm
Length
34.8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
7.49 mm
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA328P-PU
Manufacturer:
IR
Quantity:
11 450
Company:
Part Number:
ATMEGA328P-PU
Manufacturer:
Atmel
Quantity:
58 579
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Manufacturer:
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20 000
- ATMEGA48A-PU PDF datasheet
- ATMEGA48A-PU PDF datasheet #2
- ATMEGA48PA-MMH PDF datasheet #3
- ATMEGA328P-PU PDF datasheet #4
- Current page: 96 of 566
- Download datasheet (23Mb)
14.2.1
14.2.2
8271C–AVR–08/10
Definitions
Registers
Figure 14-1. 8-bit Timer/Counter Block Diagram
Many register and bit references in this section are written in general form. A lower case “n”
replaces the Timer/Counter number, in this case 0. A lower case “x” replaces the Output Com-
pare Unit, in this case Compare Unit A or Compare Unit B. However, when using the register or
bit defines in a program, the precise form must be used, i.e., TCNT0 for accessing
Timer/Counter0 counter value and so on.
The definitions in
Table 14-1.
The Timer/Counter (TCNT0) and Output Compare Registers (OCR0A and OCR0B) are 8-bit
registers. Interrupt request (abbreviated to Int.Req. in the figure) signals are all visible in the
Timer Interrupt Flag Register (TIFR0). All interrupts are individually masked with the Timer Inter-
rupt Mask Register (TIMSK0). TIFR0 and TIMSK0 are not shown in the figure.
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
BOTTOM
MAX
TOP
Definitions
The counter reaches the BOTTOM when it becomes 0x00.
The counter reaches its MAXimum when it becomes 0xFF (decimal 255).
The counter reaches the TOP when it becomes equal to the highest value in the
count sequence. The TOP value can be assigned to be the fixed value 0xFF
(MAX) or the value stored in the OCR0A Register. The assignment is depen-
dent on the mode of operation.
Table 14-1
Timer/Counter
TCCRnA
OCRnA
TCNTn
OCRnB
=
=
are also used extensively throughout the document.
Direction
Count
Clear
Control Logic
TOP
=
TCCRnB
Value
BOTTOM
Fixed
TOP
clk
=
Tn
0
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Detector
Edge
OCnA
OCnB
Tn
96
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