ATMEGA328P-PU Atmel, ATMEGA328P-PU Datasheet - Page 301
![MCU AVR 32K FLASH 28-PDIP](/photos/7/21/72189/453-28-dip_sml.jpg)
ATMEGA328P-PU
Manufacturer Part Number
ATMEGA328P-PU
Description
MCU AVR 32K FLASH 28-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATMEGA48A-PU.pdf
(566 pages)
2.ATMEGA48A-PU.pdf
(33 pages)
3.ATMEGA48PA-MMH.pdf
(26 pages)
4.ATMEGA328P-PU.pdf
(567 pages)
Specifications of ATMEGA328P-PU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Through Hole
Pin Count
28
Package Type
PDIP
Data Rom Size
1 KB
A/d Bit Size
10 bit
A/d Channels Available
6
Height
4.57 mm
Length
34.8 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
1.8 V
Width
7.49 mm
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600-TQFP32 - STK600 SOCKET/ADAPTER 32-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
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Manufacturer:
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Quantity:
11 450
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Part Number:
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Manufacturer:
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Quantity:
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- ATMEGA48A-PU PDF datasheet
- ATMEGA48A-PU PDF datasheet #2
- ATMEGA48PA-MMH PDF datasheet #3
- ATMEGA328P-PU PDF datasheet #4
- Current page: 301 of 567
- Download datasheet (21Mb)
28.2.1
28.3
8271D–AVR–05/11
Signature Bytes
Latching of Fuses
Table 28-9.
Note:
The status of the Fuse bits is not affected by Chip Erase. Note that the Fuse bits are locked if
Lock bit1 (LB1) is programmed. Program the Fuse bits before programming the Lock bits.
The fuse values are latched when the device enters programming mode and changes of the
fuse values will have no effect until the part leaves Programming mode. This does not apply to
the EESAVE Fuse which will take effect once it is programmed. The fuses are also latched on
Power-up in Normal mode.
All Atmel microcontrollers have a three-byte signature code which identifies the device. This
code can be read in both serial and parallel mode, also when the device is locked. The three
bytes reside in a separate address space. For the ATmega48A/PA/88A/PA/168A/PA/328/P the
signature bytes are given in
Table 28-10. Device ID
Low Fuse Byte
CKDIV8
CKOUT
SUT1
SUT0
CKSEL3
CKSEL2
CKSEL1
CKSEL0
Part
ATmega48A
ATmega48PA
ATmega88A
ATmega88PA
ATmega168A
1. The default value of SUT1...0 results in maximum start-up time for the default clock source.
2. The default setting of CKSEL3...0 results in internal RC Oscillator @ 8MHz. See
3. The CKOUT Fuse allows the system clock to be output on PORTB0. See
4. See
(3)
(4)
See
page 34
on page 36
Fuse Low Byte
Table 9-12 on page 34
”System Clock Prescaler” on page 36
for details.
ATmega48A/PA/88A/PA/168A/PA/328/P
for details.
Bit No
Table
7
6
5
4
3
2
1
0
28-10.
Signature Bytes Address
0x000
0x1E
0x1E
0x1E
0x1E
0x1E
for details.
Description
Divide clock by 8
Clock output
Select start-up time
Select start-up time
Select Clock source
Select Clock source
Select Clock source
Select Clock source
for details.
0x001
0x92
0x92
0x93
0x93
0x94
Default Value
0 (programmed)
1 (unprogrammed)
1 (unprogrammed)
0 (programmed)
0 (programmed)
0 (programmed)
1 (unprogrammed)
0 (programmed)
”Clock Output Buffer”
0x002
0x05
0x0A
0x0A
0x0F
0x06
(1)
(2)
(2)
(2)
Table 9-11 on
(1)
(2)
301
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