ATMEGA6450-16AI Atmel, ATMEGA6450-16AI Datasheet - Page 201

IC AVR MCU FLASH 64K 5V 100TQFP

ATMEGA6450-16AI

Manufacturer Part Number
ATMEGA6450-16AI
Description
IC AVR MCU FLASH 64K 5V 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet

Specifications of ATMEGA6450-16AI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK504 - STARTER KIT AVR EXP MOD 100P LCD
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA6450-16AI
Manufacturer:
Atmel
Quantity:
10 000
22. Analog to Digital Converter
22.1
2570M–AVR–04/11
Features
The Atmel ATmega325/3250/645/6450 features a 10-bit successive approximation ADC. The
ADC is connected to an 8-channel Analog Multiplexer which allows eight single-ended voltage
inputs constructed from the pins of Port F. The single-ended voltage inputs refer to 0V (GND).
The ADC contains a Sample and Hold circuit which ensures that the input voltage to the ADC is
held at a constant level during conversion. A block diagram of the ADC is shown in
The ADC has a separate analog supply voltage pin, AVCC. AV
0.3V from V
pin.
Internal reference voltages of nominally 1.1V or AVCC are provided On-chip. The voltage refer-
ence may be externally decoupled at the AREF pin by a capacitor for better noise performance.
The Power Reduction ADC bit, PRADC, in
abled by writing a logical zero to be able to use the ADC module.
10-bit Resolution
0.5 LSB Integral Non-linearity
± 2 LSB Absolute Accuracy
13µs - 260µs Conversion Time (50kHz to 1MHz ADC clock)
Up to 76.9kSPS at Maximum Resolution (200kHz ADC clock)
Eight Multiplexed Single Ended Input Channels
Optional Left Adjustment for ADC Result Readout
0 - V
Selectable 1.1V ADC Reference Voltage
Free Running or Single Conversion Mode
ADC Start Conversion by Auto Triggering on Interrupt Sources
Interrupt on ADC Conversion Complete
Sleep Mode Noise Canceler
CC
ADC Input Voltage Range
CC
. See the paragraph
“ADC Noise Canceler” on page 207
“Power Reduction Register” on page 37
ATmega325/3250/645/6450
CC
must not differ more than ±
on how to connect this
Figure
must be dis-
22-1.
201

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