AT87C51RD2-RDTUM Atmel, AT87C51RD2-RDTUM Datasheet - Page 55

IC 8051 MCU 32K OTP 40MHZ 64VQFP

AT87C51RD2-RDTUM

Manufacturer Part Number
AT87C51RD2-RDTUM
Description
IC 8051 MCU 32K OTP 40MHZ 64VQFP
Manufacturer
Atmel
Series
87Cr
Datasheet

Specifications of AT87C51RD2-RDTUM

Core Processor
8051
Core Size
8-Bit
Speed
40/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
48
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
UART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT87C51RD2-RDTUM
Manufacturer:
Atmel
Quantity:
10 000
9.3.3
9.3.4
4188F–8051–01/08
* See Table 31. for proper value on these inputs
Programming Algorithm
Verify algorithm
PROGRAM SIGNALS*
CONTROL SIGNALS*
Figure 9-1.
The Improved Quick Pulse algorithm is based on the Quick Pulse algorithm and decreases the
number of pulses applied during byte programming from 25 to 1.
To program the TS87C51RB2/RC2/RD2 the following sequence must be exercised:
Repeat step 2 through 6 changing the address and data for the entire array or until the end of
the object file is reached (See
Code array verify must be done after each byte or block of bytes is programmed. In either case,
a complete verify of the programmed array will ensure reliable programming of the
TS87C51RB2/RC2/RD2.
P 2.7 is used to enable data output.
To verify the TS87C51RB2/RC2/RD2 code the following sequence must be exercised:
Repeat step 2 through 3 changing the address for the entire array verification (See Figure 9-2.)
• Step 1: Activate the combination of control signals.
• Step 2: Input the valid address on the address lines.
• Step 3: Input the appropriate data on the data lines.
• Step 4: Raise EA/VPP from VCC to VPP (typical 12.75V).
• Step 5: Pulse ALE/PROG once.
• Step 6: Lower EA/VPP from VPP to VCC
• Step 1: Activate the combination of program and control signals.
• Step 2: Input the valid address on the address lines.
• Step 3: Read data on the data lines.
4 to 6 MHz
Set-Up Modes Configuration
EA/VPP
ALE/PROG
RST
PSEN
P2.6
P2.7
P3.3
P3.6
P3.7
XTAL1
Figure
P2.0-P2.5
P3.4-P3.5
9-2).
P0.0-P0.7
P1.0-P1.7
VCC
VSS
GND
+5V
D0-D7
A0-A7
A8-A15
AT/TS8xC51Rx2
55

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