AT89C51SND1C-ROTUL Atmel, AT89C51SND1C-ROTUL Datasheet - Page 22
![IC 8051 MCU FLASH 64K MP3 80TQFP](/photos/12/13/121358/313-80-tqfp_sml.jpg)
AT89C51SND1C-ROTUL
Manufacturer Part Number
AT89C51SND1C-ROTUL
Description
IC 8051 MCU FLASH 64K MP3 80TQFP
Manufacturer
Atmel
Series
89Cr
Datasheet
1.AT80C51SND1C-ROTIL.pdf
(213 pages)
Specifications of AT89C51SND1C-ROTUL
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, IDE/ATAPI, MMC, SPI, UART/USART, USB
Peripherals
Audio, I²S, MP3, PCM, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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6.5
6.5.1
6.5.2
6.5.3
22
Boot Memory Execution
AT8xC51SND1C
Software Boot Mapping
Hardware Condition Boot Mapping
Programmed Condition Boot Mapping
Level 2 locks also hardware verifying of both user and boot memories
Level 3 locks also the external execution.
Table 21. Lock Bit Features
Notes:
As internal C51 code space is limited to 64K Bytes, some mechanisms are implemented to allow
boot memory to be mapped in the code space for execution at addresses from F000h to FFFFh.
The boot memory is enabled by setting the ENBOOT bit in AUXR1 (see Figure 22). The three
ways to set this bit are detailed in the following sections.
The software way to set ENBOOT consists in writing to AUXR1 from the user’s software. This
enables boot loader or API routines execution.
The hardware condition is based on the ISP pin. When driving this pin to low level, the chip reset
sets ENBOOT and forces the reset vector to F000h instead of 0000h in order to execute the
boot loader software.
As shown in Figure 6-7 the hardware condition always allows in-system recovery when user’s
memory has been corrupted.
The programmed condition is based on the Boot Loader Jump Bit (BLJB) in HSB. As shown in
Figure 6-7 when this bit is programmed (by hardware or software programming mode), the chip
reset set ENBOOT and forces the reset vector to F000h instead of 0000h, in order to execute
the boot loader software.
1. U means unprogrammed, P means programmed and X means don’t care (programmed or
2. LB2 is not implemented in the AT8xC51SND1C products.
3. AT89C51SND1C products are delivered with third level programmed to ensure that the code
Level LB2
3
0
1
2
(3)
unprogrammed).
programmed by software using ISP or user’s boot loader is secured from any hardware piracy.
U
U
U
P
(2)
LB1
U
U
P
X
LB0
(1)
U
P
X
X
Execution
Internal
Enable
Enable
Enable
Enable
Execution
External
Disable
Enable
Enable
Enable
Hardware
Verifying
Disable
Disable
Enable
Enable
Programming
Hardware
Disable
Disable
Disable
Enable
4109L–8051–02/08
Programming
Software
Enable
Enable
Enable
Enable
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