AT89C51AC3-SLSIM Atmel, AT89C51AC3-SLSIM Datasheet - Page 18

IC 8051 MCU FLASH 64K 44PLCC

AT89C51AC3-SLSIM

Manufacturer Part Number
AT89C51AC3-SLSIM
Description
IC 8051 MCU FLASH 64K 44PLCC
Manufacturer
Atmel
Series
89Cr
Datasheet

Specifications of AT89C51AC3-SLSIM

Core Processor
8051
Core Size
8-Bit
Speed
60MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
36
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89C51AC3-SLSIM
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
AT89C51AC3-SLSIM
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Registers
18
AT89C51AC3
Table 2. CKCON0 Register
CKCON0 (S:8Fh)
Clock Control Register
Note:
Reset Value = x000 0000b
Number
Bit
7
-
7
6
5
4
3
2
1
0
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit
has no effect.
Mnemonic Description
WDX2
PCAX2
WDX2
T2X2
T1X2
T0X2
SIX2
Bit
X2
6
-
Reserved
The value read from this bits is indeterminate. Do not set this bit.
WatchDog clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Programmable Counter Array clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Enhanced UART clock (MODE 0 and 2)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer2 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer1 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer0 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
CPU clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all
the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2"bits.
PCAX2
5
(1)
(1)
(1)
SIX2
(1)
4
T2X2
3
(1)
(1)
T1X2
2
4383D–8051–02/08
T0X2
1
X2
0

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