ATMEGA88-20MU Atmel, ATMEGA88-20MU Datasheet - Page 32
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ATMEGA88-20MU
Manufacturer Part Number
ATMEGA88-20MU
Description
IC AVR MCU 8K 20MHZ 5V 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets
1.ATAVRTS2080B.pdf
(378 pages)
2.ATMEGA48-20AU.pdf
(35 pages)
3.ATMEGA88-20MU.pdf
(33 pages)
Specifications of ATMEGA88-20MU
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Package
32MLF EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
23
Interface Type
SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA8x
Core
AVR8
Data Ram Size
1 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRTS2080A, ATASTK512-EK1-IND
Minimum Operating Temperature
- 40 C
A/d Inputs
8-Channel, 10-Bit
Cpu Speed
20 MIPS
Eeprom Memory
512 Bytes
Input Output
23
Interface
SPI/TWI/USART
Memory Type
Flash
Number Of Bits
8
Package Type
32-pin MLF
Programmable Memory
8K Bytes
Timers
2-8-bit, 1-16-bit
Voltage, Range
4.5-5.5 V
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
No. Of Timers
3
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9.11
32
Rev. 2545B-01/04
ATmega48/88/168
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
Added section
Added item 2 to 5 in
Renamed the following bits:
Updated C code examples containing old IAR syntax.
Added PDIP to “I/O and Packages”, updated “Speed Grade” and Power Consumption
Estimates in
Updated
value.
of the PRR bits to 2-wire, Timer/Counters, USART, Analog Comparator and ADC
sections.
Updated
Updated
Extra Compare Match Interrupt OCF2B added to features in section
Timer/Counter2 with PWM and Asynchronous Operation” on page 140
Updated
page 286 to 288 and
285. Fixed typo in
Updated whole
- SPMEN to SELFPRGEN
- PSR2 to PSRASY
- PSR10 to PSRSYNC
- Watchdog Reset to Watchdog System Reset
Updated BLBSET description in
Status Register” on page
“Watchdog Timer” on page
Figure 14-2 on page 130
Table 8-1 on page
“Stack Pointer” on page 13
34.“Features” on page
“Power Reduction Register” on page 41
“Typical Characteristics – Preliminary Data” on page
Table 11-1 on page
“Errata ATmega48” on page
Table 22-1 on page
283.
39,
Table 22-5 on page
“SPMCSR – Store Program Memory Control and
and
1.
49.
with RAMEND as recommended Stack Pointer
67.
Table 14-3 on page
249. Added note 2 to
356.
259,
and a note regarding the use
Table 26-4
131.
Table 26-1 on page
to
315.
Table 26-7
2545LS–AVR–08/07
“8-bit
on