ATTINY25-20SI Atmel, ATTINY25-20SI Datasheet - Page 134
![IC AVR MCU 2K 20MHZ 8SOIC](/photos/6/50/65032/453-8-soic_sml.jpg)
ATTINY25-20SI
Manufacturer Part Number
ATTINY25-20SI
Description
IC AVR MCU 2K 20MHZ 8SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY25-20SI
Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
6
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
8-SOIC (3.9mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
- Current page: 134 of 236
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17.9
17.10 ADC Accuracy Definitions
134
Noise Canceling Techniques
ATtiny25/45/85
Digital circuitry inside and outside the device generates EMI which might affect the accuracy of
analog measurements. If conversion accuracy is critical, the noise level can be reduced by
applying the following techniques:
Where high ADC accuracy is required it is recommended to use ADC Noise Reduction Mode, as
described in
is above 1 MHz, or when the ADC is used for reading the internal temperature sensor, as
described in
bypass capacitors does reduce the need for using ADC Noise Reduction Mode
An n-bit single-ended ADC converts a voltage linearly between GND and V
(LSBs). The lowest code is read as 0, and the highest code is read as 2
Several parameters describe the deviation from the ideal behavior, as follows:
Figure 17-9. Offset Error
• Keep analog signal paths as short as possible.
• Make sure analog tracks run over the analog ground plane.
• Keep analog tracks well away from high-speed switching digital tracks.
• If any port pin is used as a digital output, it mustn’t switch while a conversion is in progress.
• Place bypass capacitors as close to V
• Offset: The deviation of the first transition (0x000 to 0x001) compared to the ideal transition
(at 0.5 LSB). Ideal value: 0 LSB.
Output Code
Section 17.7 on page
Section 17.12 on page
Offset
Error
132. This is especially the case when system clock frequency
137. A good system design with properly placed, external
CC
and GND pins as possible.
V
REF
Input Voltage
n
-1.
Ideal ADC
Actual ADC
REF
2586M–AVR–07/10
in 2
n
steps
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