ATMEGA2561V-8MI Atmel, ATMEGA2561V-8MI Datasheet - Page 263

IC AVR MCU 256K 8MHZ 64-QFN

ATMEGA2561V-8MI

Manufacturer Part Number
ATMEGA2561V-8MI
Description
IC AVR MCU 256K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA2561V-8MI

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2561V-8MI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 23-5.
2549M–AVR–09/10
Status Code
(TWSR)
Prescaler Bits
are 0
0xA8
0xB0
0xB8
0xC0
0xC8
Status of the 2-wire Serial Bus and
2-wire Serial Interface Hardware
Own SLA+R has been received;
ACK has been returned
Arbitration lost in SLA+R/W as
Master; own SLA+R has been
received; ACK has been returned
Data byte in TWDR has been
transmitted; ACK has been
received
Data byte in TWDR has been
transmitted; NOT ACK has been
received
Last data byte in TWDR has been
transmitted (TWEA = “0”); ACK
has been received
Status Codes for Slave Transmitter Mode
To/from TWDR
Load data byte or
Load data byte
Load data byte or
Load data byte
Load data byte or
Load data byte
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
No TWDR action or
No TWDR action or
No TWDR action or
No TWDR action
Application Software Response
STA
X
X
X
X
X
X
0
0
1
1
0
0
1
1
ATmega640/1280/1281/2560/2561
STO
0
0
0
0
0
0
0
0
0
0
0
0
0
0
To TWCR
TWINT
1
1
1
1
1
1
1
1
1
1
1
1
1
1
TWEA
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Next Action Taken by TWI Hardware
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Last data byte will be transmitted and NOT ACK should
be received
Data byte will be transmitted and ACK should be re-
ceived
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”
Switched to the not addressed Slave mode;
no recognition of own SLA or GCA;
a START condition will be transmitted when the bus
becomes free
Switched to the not addressed Slave mode;
own SLA will be recognized;
GCA will be recognized if TWGCE = “1”;
a START condition will be transmitted when the bus
becomes free
263

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