DSPIC30F6010A-20I/PT Microchip Technology, DSPIC30F6010A-20I/PT Datasheet - Page 2
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DSPIC30F6010A-20I/PT
Manufacturer Part Number
DSPIC30F6010A-20I/PT
Description
IC DSPIC MCU/DSP 144K 80TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr
Datasheets
1.DSPIC30F2011-20ISO.pdf
(66 pages)
2.DSPIC30F6011A-30IPT.pdf
(6 pages)
3.DSPIC30F6015-30IPT.pdf
(232 pages)
4.DSPIC30F6015-30IPT.pdf
(14 pages)
5.DSPIC30F6015-30IPT.pdf
(12 pages)
6.DSPIC30F6015-30IPT.pdf
(18 pages)
7.DSPIC30F6010A-30IPF.pdf
(22 pages)
Specifications of DSPIC30F6010A-20I/PT
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
144KB (48K x 24)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
For Use With
DM300019 - BOARD DEMO DSPICDEM 80L STARTERXLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC164320 - MODULE SKT MPLAB PM3 80TQFPAC30F007 - MODULE SKT FOR DSPIC30F 80TQFPDM300020 - BOARD DEV DSPICDEM MC1 MOTORCTRL
Lead Free Status / RoHS Status
Request inventory verification / Request inventory verification
Other names
DSPIC30F6010A20IP
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6010A-20I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
DSPIC30F6010A-20I/PT
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
dsPIC30F6010A/6015
11. PSV Operations
12. PLL Lock Status Bit
13. I
14. I
DS80400A-page 2
An address error trap occurs in certain addressing
modes when accessing the first four bytes of any
PSV page.
The PLL LOCK Status bit (OSCCON<5>) can
occasionally get cleared and generate an
oscillator failure trap even when the PLL is still
locked and functioning correctly.
The I
operating as an I
When the I
addressing using the same address bits (A10 and
A9) as other I
not work as expected.
2
2
C Module
C Module: 10-bit Addressing Mode
2
C module loses incoming data bytes when
2
C module is configured for 10-bit
2
C devices, the A10 and A9 bits may
2
C slave.
15. I
16. I
17. I
The following sections describe the errata and work
around to these errata, where they may apply.
The 10-bit slave does not set the RBF flag or load
the I2CxRCV register on address match if the
Least Significant bits of the address are the same
as the 7-bit reserved addresses.
When the I
slave with an address of 0x102, the I2CxRCV
register content for the lower address byte is 0x01
rather than 0x02.
When the I
device generates a glitch on the SDA and SCL
pins, causing a false communication start in a
single-master configuration or a bus collision in a
multi-master configuration.
2
2
2
C Module: 10-bit Addressing Mode
C Module: 10-bit Addressing Mode
C Module
2
2
C module is enabled, the dsPIC
C module is configured as a 10-bit
© 2008 Microchip Technology Inc.
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