AT91M40800-33AI SL383 Atmel, AT91M40800-33AI SL383 Datasheet - Page 115
![IC ARM MCU 16BIT 100TQFP](/photos/6/70/67048/313-100-tqfp_sml.jpg)
AT91M40800-33AI SL383
Manufacturer Part Number
AT91M40800-33AI SL383
Description
IC ARM MCU 16BIT 100TQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets
1.AT91M40800-33AU.pdf
(18 pages)
2.AT91R40807-33AI.pdf
(153 pages)
3.AT91M40800-33AI.pdf
(21 pages)
Specifications of AT91M40800-33AI SL383
Core Processor
ARM7
Core Size
16/32-Bit
Speed
33MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Type
ROMless
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
Other names
AT91M4080033AISL3
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USART Channel Status Register
Name:
Access Type:Read Only
Reset Value: 0x18
Offset:
• RXRDY: Receiver Ready (Code Label US_RXRDY)
0 = No complete character has been received since the last read of the US_RHR or the receiver is disabled.
1 = At least one complete character has been received and the US_RHR has not yet been read.
• TXRDY: Transmitter Ready (Code Label US_TXRDY)
0 = US_THR contains a character waiting to be transferred to the Transmit Shift Register, or an STTBRK command has
been requested.
1 = US_THR is empty and there is no Break request pending TSR availability.
Equal to zero when the USART is disabled or at reset. Transmitter Enable command (in US_CR) sets this bit to one.
• RXBRK: Break Received/End of Break (Code Label US_RXBRK)
0 = No Break Received nor End of Break has been detected since the last “Reset Status Bits” command in the Control
Register.
1 = Break Received or End of Break has been detected since the last “Reset Status Bits” command in the Control Register.
• ENDRX: End of Receiver Transfer (Code Label US_ENDRX)
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the receiver is active.
• ENDTX: End of Transmitter Transfer (Code Label US_ENDTX)
0 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is inactive.
1 = The End of Transfer signal from the Peripheral Data Controller channel dedicated to the transmitter is active.
• OVRE: Overrun Error (Code Label US_OVRE)
0 = No byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted since the last
“Reset Status Bits” command.
1 = At least one byte has been transferred from the Receive Shift Register to the US_RHR when RxRDY was asserted
since the last “Reset Status Bits” command.
• FRAME: Framing Error (Code Label US_FRAME)
0 = No stop bit has been detected low since the last “Reset Status Bits” command.
1 = At least one stop bit has been detected low since the last “Reset Status Bits” command.
1354D–ATARM–08/02
PARE
31
23
15
–
–
–
7
US_CSR
0x14
FRAME
30
22
14
–
–
–
6
OVRE
29
21
13
–
–
–
5
ENDTX
28
20
12
–
–
–
4
ENDRX
27
19
11
–
–
–
3
RXBRK
26
18
10
–
–
–
2
AT91X40 Series
TXEMPTY
TXRDY
25
17
–
–
9
1
TIMEOUT
RXRDY
24
16
–
–
8
0
115
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