TS87C51RD2-MCE Atmel, TS87C51RD2-MCE Datasheet - Page 34
![IC MCU 8BIT 64K OTP 40MHZ 44VQFP](/photos/6/92/69202/313-44-vqfp_sml.jpg)
TS87C51RD2-MCE
Manufacturer Part Number
TS87C51RD2-MCE
Description
IC MCU 8BIT 64K OTP 40MHZ 44VQFP
Manufacturer
Atmel
Series
87Cr
Specifications of TS87C51RD2-MCE
Core Processor
8051
Core Size
8-Bit
Speed
40/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (64K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
6.6. TS80C51Rx2 Serial I/O Port
The serial I/O port in the TS80C51Rx2 is compatible with the serial I/O port in the 80C52.
It provides both synchronous and asynchronous communication modes. It operates as an Universal Asynchronous
Receiver and Transmitter (UART) in three full-duplex modes (Modes 1, 2 and 3). Asynchronous transmission and
reception can occur simultaneously and at different baud rates
Serial I/O port includes the following enhancements:
6.6.1. Framing Error Detection
Framing bit error detection is provided for the three asynchronous modes (modes 1, 2 and 3). To enable the framing
bit error detection feature, set SMOD0 bit in PCON register (See Figure 13).
When this feature is enabled, the receiver checks each incoming data frame for a valid stop bit. An invalid stop
bit may result from noise on the serial lines or from simultaneous transmission by two CPUs. If a valid stop bit
is not found, the Framing Error bit (FE) in SCON register (See Table 16.) bit is set.
34
Framing error detection
Automatic address recognition
SM0/FE
SMOD1
SMOD0
SM1
Figure 13. Framing Error Block Diagram
SM2
-
REN
Set FE bit if stop bit is 0 (framing error) (SMOD0 = 1)
SM0 to UART mode control (SMOD = 0)
POF
To UART framing error control
TB8
GF1
RB8
GF0
PD
TI
IDL
RI
SCON (98h)
PCON (87h)
Rev. C - 06 March, 2001