TS87C51RB2-LCA Atmel, TS87C51RB2-LCA Datasheet - Page 26
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TS87C51RB2-LCA
Manufacturer Part Number
TS87C51RB2-LCA
Description
IC MCU 8BIT 16K OTP 30MHZ 40-DIP
Manufacturer
Atmel
Series
87Cr
Datasheets
1.TS87C51RB2-VIA.pdf
(3 pages)
2.TS87C51RB2-VIA.pdf
(86 pages)
3.TS87C51RB2-VIA.pdf
(74 pages)
Specifications of TS87C51RB2-LCA
Core Processor
8051
Core Size
8-Bit
Speed
30/20MHz
Connectivity
UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (16K x 8)
Program Memory Type
OTP
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Data Converters
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
TS87C51RB2-LCA
Manufacturer:
CY
Quantity:
14
TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
The CCON SFR contains the run control bit for the PCA and the flags for the PCA timer (CF) and each
module (Refer to Table 9).
The watchdog timer function is implemented in module 4 (See Figure 10).
The PCA interrupt system is shown in Figure 8
26
Bit CR (CCON.6) must be set by software to run the PCA. The PCA is shut off by clearing this bit.
Bit CF: The CF bit (CCON.7) is set when the PCA counter overflows and an interrupt will be generated if the
ECF bit in the CMOD register is set. The CF bit can only be cleared by software.
Bits 0 through 4 are the flags for the modules (bit 0 for module 0, bit 1 for module 1, etc.) and are set by
hardware when either a match or a capture occurs. These flags also can only be cleared by software.
Address 0D8H
a.
CF
CR
-
CCF4
CCF3
CCF2
CCF1
CCF0
CCON
Symbol
User software should not write 1s to reserved bits. These bits may be used in future 8051 family
products to invoke new features. In that case, the reset or inactive value of the new bit will be 0, and its
active value will be 1. The value read from a reserved bit is indeterminate.
Table 9. CCON: PCA Counter Control Register
Reset value
Function
PCA Counter Overflow flag. Set by hardware when the counter rolls over. CF flags
an interrupt if bit ECF in CMOD is set. CF may be set by either hardware or software but
can only be cleared by software.
PCA Counter Run control bit. Set by software to turn the PCA counter on. Must be cleared
by software to turn the PCA counter off.
Not implemented, reserved for future use.
PCA Module 4 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 3 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 2 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 1 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
PCA Module 0 interrupt flag. Set by hardware when a match or capture occurs. Must be
cleared by software.
CF
0
CR
0
X
-
a
CCF4
0
CCF3
0
CCF2
Rev. C - 06 March, 2001
0
CCF1
0
CCF0
0