TS87C51RB2-VCA Atmel, TS87C51RB2-VCA Datasheet - Page 2

• Manufacturer Part Number: TS87C51RB2-VCA
• Description: IC MCU 8BIT 16K OTP 40MHZ 40-DIP
• Manufacturer: Atmel
• Series: 87Cr

Specifications of TS87C51RB2-VCA

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 40/30MHz
• Connectivity: UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -

3. JBC/Double IT When External IT Occurs During JBC Instruction
On polling algorithm in ISR on IE1 or IE0, when the external IT appears during JBC instruction, the flag is not cleared. On
the next JBC instruction another IT is pending. Therefore, the same IT is seen twice.
Workaround
Use JB Instruction instead of JBC instruction to test bit and CLR instruction to clear it.n twice.
4. Timer2/Downcounter Mode/Double IT with Slow External Clock
Double IT with slow external clock in downcount mode. Timer 2 in 16-bit autoreload in count-down mode with external clock
input two interrupts are generated successively with low frequency on clock input (typ 10-40 KHz).
Workaround
Reload FFFE into TH2-TL2 in ISR and count down to RCAP-1 (to recover cycle lost in ISR)
Caution: do not work if initially RCAP = 0x0000
5. Input Trigger Consumption/All C51 Type I/O Ports
Some static consumption in input triggers of I/O ports may occur when entries are driven close to the trigger threshold
(1 mA to 2 mA for each I/O at Vin = 2.4V for Vcc = 5V)
Workaround
None.
6. Movx/Port0/Read Mode
When reading External Ram using Movx instruction, Port0’s SFR may contain ‘0’ whereas any acces to external memories
(data or program) should write ’1’ into them .
‘0’ is written to each bit of the Port0 buffers prior to a Movx access. This problem has no consequence when the Movx cycle
is a write, as the correct value is immediately substitued and is present on Port0 during the duration of the write pulse
(WR = 0). When the Movx is a read, the strong internal pull-down N transistor creates a short circuit with the external RAM
buffer or peripheral when the RAM or peripheral reads ‘1’.
Workaround
Replace any movx A,@Ri instruction by the sequence:
mov P0, #FFh
movx A, @Ri
2
A/TS8xC51Rx2
mov P0, #FFh
movx A, @DPTR
Replace any movx A,@DPTR instruction by the sequence:
4154D–8051–03/08