ATMEGA8535-16PJ Atmel, ATMEGA8535-16PJ Datasheet - Page 128
![IC MCU AVR 8K 5V 16MHZ 40-DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA8535-16PJ
Manufacturer Part Number
ATMEGA8535-16PJ
Description
IC MCU AVR 8K 5V 16MHZ 40-DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535-16PJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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8-bit Timer/Counter
Register Description
Timer/Counter Control
Register – TCCR2
128
ATmega8535(L)
Figure 63. Timer/Counter Timing Diagram, Clear Timer on Compare Match Mode, with
Prescaler (f
• Bit 7 – FOC2: Force Output Compare
The FOC2 bit is only active when the WGM bits specify a non-PWM mode. However, for
ensuring compatibility with future devices, this bit must be set to zero when TCCR2 is
written when operating in PWM mode. When writing a logical one to the FOC2 bit, an
immediate Compare Match is forced on the Waveform Generation unit. The OC2 output
is changed according to its COM21:0 bits setting. Note that the FOC2 bit is implemented
as a strobe. Therefore it is the value present in the COM21:0 bits that determines the
effect of the forced compare.
A FOC2 strobe will not generate any interrupt, nor will it clear the timer in CTC mode
using OCR2 as TOP.
The FOC2 bit is always read as zero.
• Bit 6, 3 – WGM21:0: Waveform Generation Mode
These bits control the counting sequence of the counter, the source for the maximum
(TOP) counter value, and what type of waveform generation to be used. Modes of oper-
ation supported by the Timer/Counter unit are: Normal mode, Clear Timer on Compare
Match (CTC) mode, and two types of Pulse Width Modulation (PWM) modes. See Table
51 and “Modes of Operation” on page 122.
TCNTn
(clk
Bit
Read/Write
Initial Value
OCRn
(CTC)
OCFn
clk
clk
I/O
I/O
Tn
/8)
clk_I/O
FOC2
W
7
0
/8)
TOP - 1
WGM20
R/W
6
0
COM21
R/W
5
0
COM20
R/W
TOP
4
0
WGM21
TOP
R/W
3
0
CS22
R/W
BOTTOM
2
0
CS21
R/W
1
0
CS20
R/W
0
0
2502K–AVR–10/06
BOTTOM + 1
TCCR2
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