ATMEGA8535-16AJ Atmel, ATMEGA8535-16AJ Datasheet - Page 24
![IC MCU AVR 8K 5V 16MHZ 44-TQFP](/photos/6/70/67042/313-44-tqfp_sml.jpg)
ATMEGA8535-16AJ
Manufacturer Part Number
ATMEGA8535-16AJ
Description
IC MCU AVR 8K 5V 16MHZ 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8535-16AJ
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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System Clock and
Clock Options
Clock Systems and their
Distribution
CPU Clock – clk
I/O Clock – clk
Flash Clock – clk
24
ATmega8535(L)
I/O
CPU
FLASH
Figure 11 presents the principal clock systems in the AVR and their distribution. All of
the clocks need not be active at a given time. In order to reduce power consumption, the
clocks to modules not being used can be halted by using different sleep modes, as
described in “Power Management and Sleep Modes” on page 32. The clock systems
are detailed below.
Figure 11. Clock Distribution
The CPU clock is routed to parts of the system concerned with operation of the AVR
core. Examples of such modules are the General Purpose Register File, the Status Reg-
ister and the data memory holding the Stack Pointer. Halting the CPU clock inhibits the
core from performing general operations and calculations.
The I/O clock is used by the majority of the I/O modules, like Timer/Counters, SPI, and
USART. The I/O clock is also used by the External Interrupt module, but note that some
external interrupts are detected by asynchronous logic, allowing such interrupts to be
detected even if the I/O clock is halted. Also note that address recognition in the TWI
module is carried out asynchronously when clk
tion in all sleep modes.
The Flash clock controls operation of the Flash interface. The Flash clock is usually
active simultaneously with the CPU clock.
Asynchronous
Timer/Counter
Timer/Counter
Oscillator
General I/O
External RC
Modules
Oscillator
clk
clk
ASY
I/O
External Clock
Control Unit
AVR Clock
Multiplexer
ADC
Clock
Source clock
clk
ADC
I/O
Reset Logic
CPU Core
clk
Oscillator
clk
Crystal
is halted, enabling TWI address recep-
CPU
FLASH
Watchdog clock
Crystal Oscillator
Low-frequency
RAM
Watchdog Timer
Watchdog
Oscillator
2502K–AVR–10/06
Calibrated RC
Flash and
EEPROM
Oscillator
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