ATMEGA48V-10MI Atmel, ATMEGA48V-10MI Datasheet - Page 217
![no-image](/images/manufacturer_photos/0/0/78/atmel_sml.jpg)
ATMEGA48V-10MI
Manufacturer Part Number
ATMEGA48V-10MI
Description
IC AVR MCU 4K 5V 12MHZ 32-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA48V-10MI
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-VQFN Exposed Pad, 32-HVQFN, 32-SQFN, 32-DHVQFN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
ATMEGA48V-12MI
ATMEGA48V-12MI
ATMEGA48V-12MI
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA48V-10MI
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 217 of 378
- Download datasheet (8Mb)
21.6
Figure 21-10. Interfacing the Application to the TWI in a Typical Transmission
2545S–AVR–07/10
Using the TWI
writes to TWCR to
TWI bus
transmission of
1. Application
START condition sent
Status code indicates
START
initiate
2. TWINT set.
START
TWDR, and loads appropriate control
3. Check TWSR to see if START was
signals into TWCR, makin sure that
sent. Application loads SLA+W into
The TWINT Flag is set in the following situations:
• After the TWI has transmitted a START/REPEATED START condition.
• After the TWI has transmitted SLA+R/W.
• After the TWI has transmitted an address byte.
• After the TWI has lost arbitration.
• After the TWI has been addressed by own slave address or general call.
• After the TWI has received a data byte.
• After a STOP or REPEATED START has been received while still addressed as a Slave.
• When a bus error has occurred due to an illegal START or STOP condition.
The AVR TWI is byte-oriented and interrupt based. Interrupts are issued after all bus events, like
reception of a byte or transmission of a START condition. Because the TWI is interrupt-based,
the application software is free to carry on other operations during a TWI byte transfer. Note that
the TWI Interrupt Enable (TWIE) bit in TWCR together with the Global Interrupt Enable bit in
SREG allow the application to decide whether or not assertion of the TWINT Flag should gener-
ate an interrupt request. If the TWIE bit is cleared, the application must poll the TWINT Flag in
order to detect actions on the TWI bus.
When the TWINT Flag is asserted, the TWI has finished an operation and awaits application
response. In this case, the TWI Status Register (TWSR) contains a value indicating the current
state of the TWI bus. The application software can then decide how the TWI should behave in
the next TWI bus cycle by manipulating the TWCR and TWDR Registers.
Figure 21-10
this example, a Master wishes to transmit a single data byte to a Slave. This description is quite
abstract, a more detailed explanation follows later in this section. A simple code example imple-
menting the desired behavior is also presented.
1. The first step in a TWI transmission is to transmit a START condition. This is done by
and TWSTA is written to zero.
TWINT is written to one,
writing a specific value into TWCR, instructing the TWI hardware to transmit a START
SLA+W
is a simple example of how the application can interface to the TWI hardware. In
Status code indicates
SLA+W sent, ACK
4. TWINT set.
received
A
Application loads data into TWDR, and
5. Check TWSR to see if SLA+W was
loads appropriate control signals into
TWCR, making sure that TWINT is
sent and ACK received.
written to one
Data
data sent, ACK received
Status code indicates
6. TWINT set.
ATmega48/88/168
A
making sure that TWINT is written to one
7. Check TWSR to see if data was sent
Application loads appropriate control
signals to send STOP into TWCR,
STOP
and ACK received.
TWINT set
Indicates
217
Related parts for ATMEGA48V-10MI
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![ATMEGA48V-10AI](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 5V 10MHZ 32-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10MU](/photos/12/13/121308/atmega48v-10mu_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 10MHZ 1.8V 32-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10PU](/photos/7/21/72189/453-28-dip_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 10MHZ 1.8V 28DIP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10MMU](/photos/12/32/123209/28m1-vqfn_tmb.jpg)
Part Number:
Description:
MCU AVR 4K FLASH 10MHZ 28-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10AJ](/photos/6/91/69154/313-32-tqfp_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 5V 10MHZ 32-TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10MJ](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 5V 10MHZ 32-QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10PI](/photos/7/21/72189/453-28-dip_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 5V 10MHZ 28-DIP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10PJ](/photos/7/21/72189/453-28-dip_tmb.jpg)
Part Number:
Description:
IC AVR MCU 4K 5V 10MHZ 28-DIP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10AUR](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
MCU AVR 4KB FLASH 10MHZ 32TQFP
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10MUR](/images/manufacturer_photos/0/0/78/atmel_tmb.jpg)
Part Number:
Description:
MCU AVR 4KB FLASH 10MHZ 32QFN
Manufacturer:
Atmel
Datasheet:
![ATMEGA48V-10MMH](/photos/12/32/123209/28m1-vqfn_tmb.jpg)
Part Number:
Description:
MCU AVR 4KB FLASH 20MHZ 28QFN
Manufacturer:
Atmel
Datasheet: