PIC18LF8680T-I/PT Microchip Technology, PIC18LF8680T-I/PT Datasheet - Page 154

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PIC18LF8680T-I/PT

Manufacturer Part Number
PIC18LF8680T-I/PT
Description
IC PIC MCU FLASH 32KX16 80TQFP
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet

Specifications of PIC18LF8680T-I/PT

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
68
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TFQFP
Processor Series
PIC18LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
3328 B
Interface Type
I2C, SPI, AUSART, CAN
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Number Of Timers
8
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE2000, ICE4000, DV164136, DM183032
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18LF8680T-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
PIC18F6585/8585/6680/8680
10.10 Parallel Slave Port (PSP)
PORTD also operates as an 8-bit wide Parallel Slave
Port, or microprocessor port, when control bit
PSPMODE (TRISE<4>) is set. It is asynchronously
readable and writable by the external world through RD
control input pin, RE0/RD/AD8 and WR control input
pin, RE1/WR/AD9.
The PSP can directly interface to an 8-bit micro-
processor data bus. The external microprocessor can
read or write the PORTD latch as an 8-bit latch. Setting
bit PSPMODE enables port pin RE0/RD/AD8 to be the
RD input, RE1/WR/AD9 to be the WR input and
RE2/CS/AD10 to be the CS (chip select) input. For this
functionality, the corresponding data direction bits of
the TRISE register (TRISE<2:0>) must be configured
as inputs (set). The A/D port configuration bits
PCFG2:PCFG0 (ADCON1<2:0>) must be set, which
will configure pins RE2:RE0 as digital I/O.
A write to the PSP occurs when both the CS and WR
lines are first detected low. A read from the PSP occurs
when both the CS and RD lines are first detected low.
The PORTE I/O pins become control inputs for
the
(PSPCON<4>) is set. In this mode, the user must make
sure that the TRISE<2:0> bits are set (pins are config-
ured as digital inputs) and the ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
DS30491C-page 152
Note:
microprocessor
For PIC18F8X8X devices, the Parallel
Slave
Microcontroller mode.
Port
port
is
when
available
bit
PSPMODE
only
in
FIGURE 10-28:
One bit of PORTD
Note: I/O pin has protection diodes to V
Data Bus
Set Interrupt Flag
PSPIF (PIR1<7>)
WR LATD
or
PORTD
RD PORTD
RD LATD
TRIS Latch
Data Latch
Q
D
CK
EN
EN
Q
D
PORTD AND PORTE
BLOCK DIAGRAM
(PARALLEL SLAVE PORT)
 2004 Microchip Technology Inc.
Chip Select
Read
Write
DD
and V
TTL
TTL
TTL
TTL
SS
.
RDx
pin
CS
WR
RD

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