PIC18F442-E/ML Microchip Technology, PIC18F442-E/ML Datasheet - Page 282
![IC MCU FLASH 8KX16 EE A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC18F442-E/ML
Manufacturer Part Number
PIC18F442-E/ML
Description
IC MCU FLASH 8KX16 EE A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC18F242-ISO.pdf
(332 pages)
3.PIC18F242-ISO.pdf
(14 pages)
4.PIC18F242-ISO.pdf
(16 pages)
5.PIC18F242-ISO.pdf
(16 pages)
6.PIC18F242-ISO.pdf
(14 pages)
7.PIC18LF242-ISO.pdf
(36 pages)
Specifications of PIC18F442-E/ML
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
34
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-QFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- PIC16F616T-ISL PDF datasheet
- PIC18F242-ISO PDF datasheet #2
- PIC18F242-ISO PDF datasheet #3
- PIC18F242-ISO PDF datasheet #4
- PIC18F242-ISO PDF datasheet #5
- PIC18F242-ISO PDF datasheet #6
- PIC18LF242-ISO PDF datasheet #7
- Current page: 282 of 332
- Download datasheet (6Mb)
PIC18FXX2
FIGURE 22-14:
TABLE 22-13: EXAMPLE SPI MODE REQUIREMENTS (SLAVE MODE TIMING (CKE = 0))
DS39564C-page 280
70
71
71A
72
72A
73
73A
74
75
76
77
78
79
80
83
Note 1: Requires the use of Parameter # 73A.
Param. No.
(CKP = 0)
(CKP = 1)
SDI
SDI
SCK
SDO
SS
SCK
Note:
2: Only if Parameter # 71A and # 72A are used.
TssL2scH,
TssL2scL
TscH
TscL
TdiV2scH,
TdiV2scL
T
TscH2diL,
TscL2diL
TdoR
TdoF
TssH2doZ
TscR
TscF
TscH2doV,
TscL2doV
TscH2ssH,
TscL2ssH
Refer to Figure 22-4 for load conditions.
B
Symbol
2
B
EXAMPLE SPI SLAVE MODE TIMING (CKE = 0)
70
SS to SCK or SCK input
SCK input high time (Slave mode)
SCK input low time (Slave mode)
Setup time of SDI data input to SCK edge
Last clock edge of Byte1 to the first clock edge of Byte2
Hold time of SDI data input to SCK edge
SDO data output rise time
SDO data output fall time
SS to SDO output hi-impedance
SCK output rise time (Master mode)
SCK output fall time (Master mode)
SDO data output valid after SCK edge PIC18FXXX
SS
80
after SCK edge
71
73
MSb In
MSb
74
72
Characteristic
75, 76
bit6 - - - - - -1
bit6 - - - -1
Continuous
Single Byte
Continuous
Single Byte
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18FXXX
PIC18LFXXX
PIC18LFXXX
78
79
1.25 T
1.25 T
1.5 T
1.5 T
LSb
79
78
LSb In
Min
T
100
100
CY
CY
40
40
10
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
83
+ 40
+ 40
+ 30
+ 30
© 2006 Microchip Technology Inc.
77
Max
150
25
60
25
60
50
25
60
25
60
50
—
—
—
—
—
—
—
—
—
Units Conditions
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
(Note 1)
(Note 2)
V
V
V
V
V
DD
DD
DD
DD
DD
= 2V
= 2V
= 2V
= 2V
= 2V
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