PIC16LF77T-I/ML Microchip Technology, PIC16LF77T-I/ML Datasheet - Page 38
![IC MCU FLASH 8KX14 A/D 44QFN](/photos/6/81/68122/150-44-qfn_sml.jpg)
PIC16LF77T-I/ML
Manufacturer Part Number
PIC16LF77T-I/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF77T-I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
14KB (8K x 14)
Program Memory Type
FLASH
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Processor Series
PIC16LF
Core
PIC
Data Bus Width
8 bit
Data Ram Size
368 B
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
33
Number Of Timers
3 bit
Operating Supply Voltage
2 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000, DM163022
Minimum Operating Temperature
- 40 C
On-chip Adc
8
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
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PIC16F7X
4.4
This section is not applicable to the PIC16F73 or
PIC16F76.
PORTD is an 8-bit port with Schmitt Trigger input buff-
ers. Each pin is individually configureable as an input or
output.
PORTD can be configured as an 8-bit wide micro-
processor port (parallel slave port) by setting control bit
PSPMODE (TRISE<4>). In this mode, the input buffers
are TTL.
TABLE 4-7:
TABLE 4-8:
DS30325B-page 36
RD0/PSP0
RD1/PSP1
RD2/PSP2
RD3/PSP3
RD4/PSP4
RD5/PSP5
RD6/PSP6
RD7/PSP7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
08h
88h
89h
Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PORTD.
Address
Name
PORTD and TRISD Registers
PORTD
TRISD
TRISE
Name
Bit#
bit0
bit1
bit2
bit3
bit4
bit5
bit6
bit7
SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
PORTD FUNCTIONS
PORTD Data Direction Register
Bit 7
RD7
IBF
Bit 6
OBF
RD6
Buffer Type
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
ST/TTL
IBOV
Bit 5
RD5
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
PSPMODE
Bit 4
RD4
Input/output port pin or parallel slave port bit0
Input/output port pin or parallel slave port bit1
Input/output port pin or parallel slave port bit2
Input/output port pin or parallel slave port bit3
Input/output port pin or parallel slave port bit4
Input/output port pin or parallel slave port bit5
Input/output port pin or parallel slave port bit6
Input/output port pin or parallel slave port bit7
Bit 3
RD3
—
PORTE Data Direction bits
FIGURE 4-6:
Bit 2
RD2
WR Port
RD Port
Note 1: I/O pins have protection diodes to V
Data Bus
WR TRIS
RD TRIS
Bit 1
RD1
Function
Data Latch
TRIS Latch
D
D
CK
CK
Bit 0
RD0
PORTD BLOCK DIAGRAM
(IN I/O PORT MODE)
Q
2002 Microchip Technology Inc.
Q
Q
xxxx xxxx
1111 1111
0000 -111
Value on:
POR,
BOR
EN
EN
D
Schmitt
Trigger
Input
Buffer
DD
and V
uuuu uuuu
1111 1111
0000 -111
Value on
RESETS
all other
SS
I/O pin
.
(1)
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