ATMEGA169V-1AC Atmel, ATMEGA169V-1AC Datasheet - Page 117
ATMEGA169V-1AC
Manufacturer Part Number
ATMEGA169V-1AC
Description
IC MCU AVR 16K 1.8V 1MHZ 64-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA169V-1AC
Core Processor
AVR
Core Size
8-Bit
Speed
1MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
64-TQFP, 64-VQFP
For Use With
ATAVRBFLY - KIT EVALUATION AVR BUTTERFLYATSTK502 - MOD EXPANSION AVR STARTER 500
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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16-bit Timer/Counter
Register Description
Timer/Counter1 Control
Register A – TCCR1A
2514H–AVR–05/03
• Bit 7:6 – COM1A1:0: Compare Output Mode for Channel A
• Bit 5:4 – COM1B1:0: Compare Output Mode for Channel B
The COM1A1:0 and COM1B1:0 control the Output Compare pins (OC1A and OC1B
respectively) behavior. If one or both of the COM1A1:0 bits are written to one, the OC1A
output overrides the normal port functionality of the I/O pin it is connected to. If one or
both of the COM1B1:0 bit are written to one, the OC1B output overrides the normal port
functionality of the I/O pin it is connected to. However, note that the Data Direction Reg-
ister (DDR) bit corresponding to the OC1A or OC1B pin must be set in order to enable
the output driver.
When the OC1A or OC1B is connected to the pin, the function of the COM1x1:0 bits is
dependent of the WGM13:0 bits setting. Table 55 shows the COM1x1:0 bit functionality
when the WGM13:0 bits are set to a Normal or a CTC mode (non-PWM).
Table 55. Compare Output Mode, non-PWM
Table 56 shows the COM1x1:0 bit functionality when the WGM13:0 bits are set to the
fast PWM mode.
Table 56. Compare Output Mode, Fast PWM
Note:
Bit
Read/Write
Initial Value
COM1A1/COM1B1
COM1A1/COM1B1
1. A special case occurs when OCR1A/OCR1B equals TOP and COM1A1/COM1B1 is
0
0
1
1
0
0
1
1
set. In this case the compare match is ignored, but the set or clear is done at TOP.
See “Fast PWM Mode” on page 109. for more details.
COM1A1
R/W
7
0
COM1A0
COM1A0/COM1B0
COM1A0/COM1B0
R/W
6
0
0
1
0
1
0
1
0
1
COM1B1
R/W
5
0
COM1B0
R/W
4
0
Description
Normal port operation, OC1A/OC1B
disconnected.
Toggle OC1A/OC1B on Compare Match.
Clear OC1A/OC1B on Compare Match (Set
output to low level).
Set OC1A/OC1B on Compare Match (Set output
to high level).
Description
Normal port operation, OC1A/OC1B
disconnected.
WGM13:0 = 15: Toggle OC1A on Compare
Match, OC1B disconnected (normal port
operation). For all other WGM1 settings, normal
port operation, OC1A/OC1B disconnected.
Clear OC1A/OC1B on Compare Match, set
OC1A/OC1B at TOP
Set OC1A/OC1B on Compare Match, clear
OC1A/OC1B at TOP
(1)
R
3
–
0
R
2
–
0
ATmega169V/L
WGM11
R/W
1
0
WGM10
R/W
0
0
TCCR1A
117
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