ATTINY26L-8SC Atmel, ATTINY26L-8SC Datasheet - Page 101
ATTINY26L-8SC
Manufacturer Part Number
ATTINY26L-8SC
Description
IC AVR MCU 2K LV 8MHZ COM 20SOIC
Manufacturer
Atmel
Series
AVR® ATtinyr
Specifications of ATTINY26L-8SC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
USI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
16
Program Memory Size
2KB (1K x 16)
Program Memory Type
FLASH
Eeprom Size
128 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
20-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATTINY26L-8SC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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ADC Multiplexer
Selection Register –
ADMUX
1477K–AVR–08/10
• Bit 7, 6 – REFS1, REFS0: Reference Selection Bits
These bits select the voltage reference for the ADC, as shown in Table 45. If these bits are
changed during a conversion, the change will not go in effect until this conversion is complete
(ADIF in ADCSR is set). The user should disregard the first conversion result after changing
these bits to obtain maximum accuracy. If differential channels are used, using AVCC or an
external AREF higher than (AVCC - 0.2V) is not recommended, as this will affect ADC accuracy.
The internal voltage reference may not be used if an external reference voltage is being applied
to the AREF pin.
Table 45. Voltage Reference Selections for ADC
•
The ADLAR bit affects the presentation of the ADC conversion result in the ADC Data Register.
If ADLAR is cleared, the result is right adjusted. If ADLAR is set, the result is left adjusted.
Changing the ADLAR bit will affect the ADC Data Register immediately, regardless of any ongo-
ing conversions. For a complete description of this bit, see “ADC Data Register – ADCL and
ADCH” on page 104.
• Bits 4..0 – MUX4..MUX0: Analog Channel and Gain Selection Bits
The value of these bits selects which combination of analog inputs are connected to the ADC.
These bits also select the gain for the differential channels. See Table 46 for details. If these bits
are changed during a conversion, the change will not go in effect until this conversion is
complete (ADIF in ADCSR is set).
Bit
$07 ($27)
Read/Write
Initial Value
REFS1
Bit 5 – ADLAR: ADC Left Adjust Result
0
0
1
1
REFS0
0
1
0
1
REFS1
R/W
7
0
Voltage Reference Selection
AVCC
AREF (PA3), Internal Vref turned off.
Internal Voltage Reference (2.56 V), AREF pin (PA3) not connected.
Internal Voltage Reference (2.56 V) with external capacitor at AREF pin
(PA3).
REFS0
R/W
6
0
ADLAR
R/W
5
0
MUX4
R/W
4
0
MUX3
R/W
3
0
MUX2
R/W
2
0
MUX1
R/W
1
0
MUX0
R/W
0
0
ADMUX
101
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