ATMEGA8535-16AI Atmel, ATMEGA8535-16AI Datasheet - Page 203

IC AVR MCU 8K 16MHZ IND 44-TQFP

ATMEGA8535-16AI

Manufacturer Part Number
ATMEGA8535-16AI
Description
IC AVR MCU 8K 16MHZ IND 44-TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8535-16AI

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
32
Number Of Timers
2 x 8 bit
Operating Supply Voltage
4.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
2 bit
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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Analog Comparator
Special Function IO Register –
SFIOR
Analog Comparator Control
and Status Register – ACSR
2502K–AVR–10/06
The Analog Comparator compares the input values on the positive pin AIN0 and nega-
tive pin AIN1. When the voltage on the positive pin AIN0 is higher than the voltage on
the negative pin AIN1, the Analog Comparator Output, ACO, is set. The comparator’s
output can be set to trigger the Timer/Counter1 Input Capture function. In addition, the
comparator can trigger a separate interrupt, exclusive to the Analog Comparator. The
user can select Interrupt triggering on comparator output rise, fall or toggle. A block dia-
gram of the comparator and its surrounding logic is shown in Figure 97.
Figure 97. Analog Comparator Block Diagram
Notes:
• Bit 3 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is
zero), the ADC multiplexer selects the negative input to the Analog Comparator. When
this bit is written logic zero, AIN1 is applied to the negative input of the Analog Compar-
ator. For a detailed description of this bit, see “Analog Comparator Multiplexed Input” on
page 205.
• Bit 7 – ACD: Analog Comparator Disable
When this bit is written logic one, the power to the Analog Comparator is switched off.
This bit can be set at any time to turn off the Analog Comparator. This will reduce power
consumption in active and Idle mode. When changing the ACD bit, the Analog Compar-
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC MULTIPLEXER
REFERENCE
ACME
ADEN
BANDGAP
OUTPUT
1. See Table 81 on page 205.
2. Refer to Figure 1 on page 2 and Table 26 on page 60 for Analog Comparator pin
placement.
ADTS2
R/W
(1)
ACBG
7
0
ACD
R/W
7
0
ADTS1
R/W
ACBG
R/W
6
0
6
0
ADTS0
ACO
R/W
N/A
R
5
5
0
R/W
ACI
4
0
R
4
0
(2)
ACIE
R/W
ACME
3
0
R/W
3
0
ACIC
R/W
2
0
ATmega8535(L)
PUD
R/W
2
0
ACIS1
R/W
PSR2
1
0
R/W
1
0
ACIS0
PSR10
R/W
R/W
0
0
0
0
SFIOR
ACSR
203

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