ATMEGA8515-16JC Atmel, ATMEGA8515-16JC Datasheet - Page 92
![IC AVR MCU 8K 16MHZ COM 44-PLCC](/photos/6/70/67043/453-44-plcc_sml.jpg)
ATMEGA8515-16JC
Manufacturer Part Number
ATMEGA8515-16JC
Description
IC AVR MCU 8K 16MHZ COM 44-PLCC
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA8515-16JC
Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
35
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
44-PLCC
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
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ATmega8515(L)
When OC0 is connected to the pin, the function of the COM01:0 bits depends on the
WGM01:0 bit setting. Table 45 shows the COM01:0 bit functionality when the WGM01:0
bits are set to a normal or CTC mode (non-PWM).
Table 45. Compare Output Mode, non-PWM Mode
Table 46 shows the COM01:0 bit functionality when the WGM01:0 bits are set to fast
PWM mode.
Table 46. Compare Output Mode, Fast PWM Mode
Note:
Table 47 shows the COM01:0 bit functionality when the WGM01:0 bits are set to phase
correct PWM mode.
Table 47. Compare Output Mode, Phase Correct PWM Mode
Note:
• Bit 2:0 – CS02:0: Clock Select
COM01
COM01
COM01
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
1. A special case occurs when OCR0 equals TOP and COM01 is set. In this case, the
Compare Match is ignored, but the set or clear is done at TOP. See “Fast PWM
Mode” on page 86 for more details.
Compare Match is ignored, but the set or clear is done at TOP. See “Phase Correct
PWM Mode” on page 88 for more details.
COM00
COM00
COM00
0
1
0
1
0
1
0
1
0
1
0
1
Description
Normal port operation, OC0 disconnected.
Toggle OC0 on Compare Match.
Clear OC0 on Compare Match.
Set OC0 on Compare Match.
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on Compare Match, set OC0 at TOP (Non-
Inverting).
Set OC0 on Compare Match, clear OC0 at TOP (Inverting).
Description
Normal port operation, OC0 disconnected.
Reserved
Clear OC0 on Compare Match when up-counting. Set OC0 on
Compare Match when downcounting.
Set OC0 on Compare Match when up-counting. Clear OC0 on
Compare Match when downcounting.
(1)
(1)
2512K–AVR–01/10
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