T89C51CC01CA-RLTIM Atmel, T89C51CC01CA-RLTIM Datasheet - Page 6
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T89C51CC01CA-RLTIM
Manufacturer Part Number
T89C51CC01CA-RLTIM
Description
IC 8051 MCU FLASH 32K 44VQFP
Manufacturer
Atmel
Series
AT89C CANr
Datasheets
1.T89C51CC01CA-7CTIM.pdf
(167 pages)
2.T89C51CC01CA-7CTIM.pdf
(12 pages)
3.T89C51CC01CA-7CTIM.pdf
(32 pages)
4.T89C51CC01CA-7CTIM.pdf
(29 pages)
Specifications of T89C51CC01CA-RLTIM
Core Processor
8051
Core Size
8-Bit
Speed
40MHz
Connectivity
CAN, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
1.25K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-TQFP, 44-VQFP
For Use With
AT89STK-06 - KIT DEMOBOARD 8051 MCU W/CAN
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
T89C51CC01CARLTIM
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
6
Workaround
Workaround implementation
T89C51CC01 Errata Sheet
1. At least one Receive MOB of the chip are programmed to accept the incoming message. In
this case, the transmitter will wait for the next 3-bit Intermission to retry its transmission.
2. No Receive MOB of the chip are programmed to accept the incoming message. In this case
the transmitter will wait for a 4-bit Intermission to retry its transmission. In this case, any other
CAN nodes ready to transmit after a 3-bit Intermission will start transmit before the chip transmit-
ter, even if their messages have lower priority IDs.
Always have a Receive MOB enabled ready to accept any incoming messages. Thanks to the
implementation of the CAN interface, a Receive MOB must be enable at latest, before the 1
of the DLC field. The Receive MOB status register is written (RXOK if message OK) immediately
after the 6th bit of the End of Frame field. This will leave in CAN2.0A mode a minimum 19-bit
time delay to respond to the end of message interrupt (RXOK) and re-enable the Receive MOB
before the start of the DLC field of the next incoming message. This minimum delay will be 39-bit
time in CAN2.0B. See CAN2.0A CAN2.0B frame timings below.
The workaround is to have the last MOb (MOb14) as "spy" enabled all the time; it is the MOb of
lowest priority : If a Mob other than MOb14 is programmed in receive mode and its acceptance
filter matches with the incoming message ID, this Mob will take the message. MOb14 will only
take messages than no other MObs will have accepted. MOb14 will need to be re-enabled fast
enough to manage back to back frames. The deadline to do this is the beginning of DLC slot of
incoming frames as explained above.
CAN2.0A
CAN2.0B
T 1
T 1
T 1
T 1
T 1
T 1
19 bit time minimum
39 bit time minimum
T 2
T 2
T 2
4131J–CAN–05/06
T 2
T 2
T 2
st
bit