PIC12C672T-04I/MF Microchip Technology, PIC12C672T-04I/MF Datasheet - Page 348

• Manufacturer Part Number: PIC12C672T-04I/MF
• Description: IC MCU OTP 2KX14 W/AD 8-DFN
• Manufacturer: Microchip Technology
• Series: PIC® 12Cr

Specifications of PIC12C672T-04I/MF

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 4MHz
• Peripherals: POR, WDT
• Number Of I /o: 5
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 8-DFN
• For Use With: AC164324 - MODULE SKT FOR MPLAB 8DFN/16QFNXLT08DFN2 - SOCKET TRANSITION ICE 14DIP/8DFNXLT08DFN - SOCKET TRANSITION ICE 8DFNAC164032 - ADAPTER PICSTART PLUS 8DFN/DIPAC124001 - MODULE SKT PROMATEII 8DIP/SOIC
• Lead Free Status / RoHS Status: Request inventory verification / Request inventory verification
• Eeprom Size: -
• Connectivity: -

PICmicro MID-RANGE MCU FAMILY
DS31018A-page 18-12
RX (pin)
Rcv shift
reg
Rcv buffer reg
Read Rcv
buffer reg
RCREG
RCIF
(interrupt flag)
OERR bit
CREN
Note: This timing diagram shows three words appearing on the RX input. The RCREG (receive buffer) is read after the third word,
causing the OERR (overrun) bit to be set.
Start
Steps to follow when setting up an Asynchronous Reception:
1.
2.
3.
4.
5.
6.
7.
8.
9.
Figure 18-5:
bit
Initialize the SPBRG register for the appropriate baud rate. If a high speed baud rate is
desired, set bit BRGH. (Subsection
Enable the asynchronous serial port by clearing the SYNC bit, and setting the SPEN bit.
If interrupts are desired, then set the RCIE, GIE and PEIE bits.
If 9-bit reception is desired, then set the RX9 bit.
Enable the reception by setting the CREN bit.
The RCIF flag bit will be set when reception is complete and an interrupt will be generated
if the RCIE bit was set.
Read the RCSTA register to get the ninth bit (if enabled) and determine if any error
occurred during reception.
Read the 8-bit received data by reading the RCREG register.
If any error occurred, clear the error by clearing the CREN bit.
bit0
bit1
Asynchronous Reception
bit7/8
Stop
bit
WORD 1
RCREG
Start
bit
18.3 “USART Baud Rate Generator (BRG)”
bit0
bit7/8
WORD 2
RCREG
Stop
bit
Start
bit
1997 Microchip Technology Inc.
bit7/8
Stop
bit
).