PIC16C432T-I/SS Microchip Technology, PIC16C432T-I/SS Datasheet - Page 44

• Manufacturer Part Number: PIC16C432T-I/SS
• Description: IC MCU CMOS 8BIT 20MHZ 2K 20SSOP
• Manufacturer: Microchip Technology
• Series: PIC® 16Cr

Specifications of PIC16C432T-I/SS

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: LIN (Local Interconnect Network)
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 12
• Program Memory Size: 3.5KB (2K x 14)
• Program Memory Type: OTP
• Ram Size: 128 x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 20-SSOP
• For Use With: AC164029 - MODULE SKT PROMATEII 20DIP/SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -

PIC16C432
EXAMPLE 8-1:
8.2
The full range of V
the construction of the module. The transistors on the
top and bottom of the resistor ladder network (Figure 8-
1) keep V
age Reference is V
output changes with fluctuations in V
accuracy of the Voltage Reference can be found in
Table 12-2.
8.3
When the device wakes up from SLEEP through an
interrupt or a Watchdog Timer timeout, the contents of
the VRCON register are not affected. To minimize
current consumption in SLEEP mode, the Voltage
Reference should be disabled.
FIGURE 8-2:
TABLE 8-2:
DS41140B-page 42
MOVLW
MOVWF
BSF
MOVLW
MOVWF
MOVLW
MOVWF
BCF
CALL
9Fh
1Fh
85h
Legend:
Note 1: TLINRX must be set to ‘1’ at all times.
Address
Note 1:
Voltage Reference Accuracy/Error
Operation During SLEEP
REF
— = Unimplemented, read as ‘0’
VRCON
CMCON
TRISA
Name
R is dependent upon the Voltage Reference Configuration VRCON<3:0> and VRCON<5>.
0x02
CMCON
STATUS,RP0
0x07
TRISA
0xA6
VRCON
STATUS,RP0
DELAY10
from approaching V
REGISTERS ASSOCIATED WITH VOLTAGE REFERENCE
SS
Module
DD
V
C2OUT
REF
to V
VREN
Bit 7
VOLTAGE REFERENCE
CONFIGURATION
derived and therefore, the V
VOLTAGE REFERENCE OUTPUT BUFFER EXAMPLE
—
DD
Impedance
Reference
cannot be realized due to
; 4 Inputs Muxed
; to 2 comps.
; go to Bank 1
; RA3-RA0 are
; outputs
; enable V
; low range
; set V
; go to Bank 0
; 10 s delay
Voltage
Output
C1OUT
VROE
Bit 6
R
—
SS
(1)
or V
DD
R
<3:0>=6
Bit 5
VRR
. The absolute
—
—
REF
DD
RA2
. The Volt-
TRISA4
Bit 4
•
—
—
Preliminary
REF
TRISA3
Bit 3
VR3
CIS
8.4
A device RESET disables the Voltage Reference by
clearing bit V
disconnects the reference from the RA2 pin by clearing
bit V
range by clearing bit V
value select bits, VRCON<3:0>, are also cleared.
8.5
The
independently of the comparator module. The output of
the reference generator may be connected to the RA2
pin if the TRISA<2> bit is set and the V
VRCON<6>, is set. Enabling the Voltage Reference
output onto the RA2 pin, with an input signal present,
will increase current consumption. Connecting RA2 as
a digital output with V
current consumption.
The RA2 pin can be used as a simple D/A output with
limited drive capability. Due to the limited drive
capability, a buffer must be used in conjunction with the
Voltage Reference output for external connections to
V
technique.
TRISA2 TLINRX
REF
Bit 2
CM2
VR2
ROE
.
+
–
Voltage
Figure 8-2
Effects of a RESET
Connection Considerations
(VRCON<6>) and selects the high voltage
Bit 1
CM1
VR1
•
REN
(1)
Reference
(VRCON<7>). This RESET also
V
shows
TRISA0
REF
Bit 0
CM0
VR0
REF
RR
Output
2002 Microchip Technology Inc.
enabled will also increase
(VRCON<5>). The V
an
000- 0000
00-- 0000
---1 1111
POR/BOD
Value On
Module
example
000- 0000
00-- 0000
---1 1111
Value On
All Other
RESETS
operates
buffering
ROE
REF
bit,