PIC16LC63A-04I/ML Microchip Technology, PIC16LC63A-04I/ML Datasheet - Page 103
![IC MCU OTP 4KX14 PWM 28QFN](/photos/6/81/68120/150-28-qfn_sml.jpg)
PIC16LC63A-04I/ML
Manufacturer Part Number
PIC16LC63A-04I/ML
Description
IC MCU OTP 4KX14 PWM 28QFN
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Specifications of PIC16LC63A-04I/ML
Core Processor
PIC
Core Size
8-Bit
Speed
4MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
22
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
192 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
28-VQFN Exposed Pad, 28-HVQFN, 28-SQFN, 28-DHVQFN
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
PIC16LC63A04I/ML
- Current page: 103 of 184
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COMF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECF
Syntax:
Operands:
Operation:
Status Affected:
Description:
DECFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
2000 Microchip Technology Inc.
Decrement f, Skip if 0
[ label ] DECFSZ f,d
0
d
(f) - 1
skip if result = 0
None
The contents of register ’f’ are decre-
mented. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result is
placed back in register ’f’.
If the result is 1, the next instruction is
executed. If the result is 0, then a NOP
is executed instead making it a 2 T
instruction.
Complement f
[ label ] COMF
0
d
(f)
Z
The contents of register ’f’ are comple-
mented. If ’d’ is 0, the result is stored
in W. If ’d’ is 1, the result is stored
back in register ’f’.
Decrement f
[label] DECF f,d
0
d
(f) - 1
Z
Decrement register ’f’. If ’d’ is 0, the
result is stored in the W register. If ’d’
is 1, the result is stored back in
register ’f’.
f
f
f
[0,1]
[0,1]
[0,1]
(destination)
127
127
127
(destination);
(destination)
f,d
CY
PIC16C63A/65B/73B/74B
GOTO
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCF
Syntax:
Operands:
Operation:
Status Affected:
Description:
INCFSZ
Syntax:
Operands:
Operation:
Status Affected:
Description:
Increment f, Skip if 0
[ label ]
0
d
(f) + 1
None
The contents of register ’f’ are incre-
mented. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result is
placed back in register ’f’.
If the result is 1, the next instruction is
executed. If the result is 0, a NOP is
executed instead making it a 2 T
instruction
Unconditional Branch
[ label ]
0
k
PCLATH<4:3>
None
GOTO is an unconditional branch. The
eleven bit immediate value is loaded
into PC bits <10:0>. The upper bits of
PC are loaded from PCLATH<4:3>.
GOTO is a two-cycle instruction.
Increment f
[ label ]
0
d
(f) + 1
Z
The contents of register ’f’ are incre-
mented. If ’d’ is 0, the result is placed
in the W register. If ’d’ is 1, the result is
placed back in register ’f’.
skip if result = 0
f
k
f
[0,1]
[0,1]
PC<10:0>
127
127
2047
.
(destination),
(destination)
GOTO k
INCFSZ f,d
INCF f,d
DS30605C-page 103
PC<12:11>
CY
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