PIC16C774-E/PQ Microchip Technology, PIC16C774-E/PQ Datasheet - Page 69
![IC MCU OTP 4KX14 A/D PWM 44-MQFP](/photos/6/59/65984/150-44-pqfp_sml.jpg)
PIC16C774-E/PQ
Manufacturer Part Number
PIC16C774-E/PQ
Description
IC MCU OTP 4KX14 A/D PWM 44-MQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C773SO.pdf
(201 pages)
3.PIC16C774P.pdf
(13 pages)
4.PIC16C774P.pdf
(16 pages)
Specifications of PIC16C774-E/PQ
Core Processor
PIC
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
7KB (4K x 14)
Program Memory Type
OTP
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 125°C
Package / Case
44-MQFP, 44-PQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Other names
PIC16C774E/PQ
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C774-E/PQ
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C773SO PDF datasheet #2
- PIC16C774P PDF datasheet #3
- PIC16C774P PDF datasheet #4
- Current page: 69 of 201
- Download datasheet (3Mb)
8.2.2
The addressing procedure for the I
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address which
can address all devices. When this address is used, all
devices should, in theory, respond with an acknowl-
edge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
is set). Following a start-bit detect, 8-bits are shifted
into SSPSR and the address is compared against
SSPADD, and is also compared to the general call
address, fixed in hardware.
FIGURE 8-16: SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7 OR 10-BIT MODE)
1999 Microchip Technology Inc.
GCEN
(SSPCON2<7>)
SSPOV
(SSPCON<6>)
SDA
SCL
SSPIF
BF
(SSPSTAT<0>)
GENERAL CALL ADDRESS SUPPORT
S
1
2
General Call Address
2
C bus is such that
3
2
C protocol. It
4
Advance Information
5
6
7
R/W = 0
8
If the general call address matches, the SSPSR is
transfered to the SSPBUF, the BF flag is set (eighth bit),
and on the falling edge of the ninth bit (ACK bit) the
SSPIF flag is set.
When the interrupt is serviced. The source for the
interrupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match, and the UA
bit is set (SSPSTAT<1>). If the general call address is
sampled when GCEN is set while the slave is config-
ured in 10-bit address mode, then the second half of
the address is not necessary, the UA bit will not be set,
and the slave will begin receiving data after the
acknowledge
ACK
Address is compared to General Call Address
after ACK, set interrupt flag
9
D7
1
D6
2
Cleared in software
SSPBUF is read
(Figure
Receiving data
D5
3
D4
4
8-16).
D3
5
PIC16C77X
D2
6
D1
7
DS30275A-page 69
D0
8
ACK
9
’0’
’1’
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