AT89S8252-24PC Atmel, AT89S8252-24PC Datasheet - Page 26
![MCU W/SPI 8KB FLSH 2K EEP 40-DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
AT89S8252-24PC
Manufacturer Part Number
AT89S8252-24PC
Description
MCU W/SPI 8KB FLSH 2K EEP 40-DIP
Manufacturer
Atmel
Series
89Sr
Datasheet
1.AT89S8252-24AC.pdf
(41 pages)
Specifications of AT89S8252-24PC
Core Processor
8051
Core Size
8-Bit
Speed
24MHz
Connectivity
SPI, UART/USART
Peripherals
POR, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
4 V ~ 6 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Data Converters
-
Other names
AT89S825224PC
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT89S8252-24PC
Manufacturer:
ATM
Quantity:
4 390
Company:
Part Number:
AT89S8252-24PC
Manufacturer:
ATM
Quantity:
4 390
Part Number:
AT89S8252-24PC
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Serial Programming
Instruction
Instruction Set
Notes:
26
Instruction
Programming Enable
Chip Erase
Read Code Memory
Write Code Memory
Read Data Memory
Write Data Memory
Write Lock Bits
1. DATA polling is used to indicate the end of a byte write cycle which typically takes less than 2.5 ms at 5V.
2. “aaaaa” = high order address.
3. “x” = don’t care.
AT89S8252
1010 1100
aaaa a001
aaaa a010
00aa a110
1010 1100
1010 1100
00aa a101
Byte 1
The Instruction Set for Serial Programming follows a 3-byte protocol and is shown in the
following table:
Input Format
0101 0011
xxxx x100
low addr
low addr
low addr
low addr
Byte 2
x x111
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Byte 3
data in
data in
Operation
Enable serial programming interface after RST goes high.
Chip erase both 8K & 2K memory arrays.
Read data from Code memory array at the selected address.
The 5 MSBs of the first byte are the high order address bits.
The low order address bits are in the second byte. Data are
available at pin MISO during the third byte.
Write data to Code memory location at selected address. The
address bits are the 5 MSBs of the first byte together with the
second byte.
Read data from Data memory array at selected address. Data
are available at pin MISO during the third byte.
Write data to Data memory location at selected address.
Write lock bits.
Set LB1, LB2 or LB3 = “0” to program lock bits.
0401G–MICRO–3/06