AT89C52-24PC Atmel, AT89C52-24PC Datasheet - Page 4

• Manufacturer Part Number: AT89C52-24PC
• Description: IC MICRO CTRL 24MHZ 40DIP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C52-24PC

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 24MHz
• Connectivity: SIO, UART/USART
• Number Of I /o: 32
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -
• Data Converters: -
• Peripherals: -

timing or clocking purposes. Note, however, that one ALE
pulse is skipped during each access to external data
memory.
If desired, ALE operation can be disabled by setting bit 0 of
SFR location 8EH. With the bit set, ALE is active only dur-
ing a MOVX or MOVC instruction. Otherwise, the pin is
weakly pulled high. Setting the ALE-disable bit has no
effect if the microcontroller is in external execution mode.
PSEN
Program Store Enable is the read strobe to external pro-
gram memory.
When the AT89C52 is executing code from external pro-
gram memory, PSEN is activated twice each machine
cycle, except that two PSEN activations are skipped during
each access to external data memory.
Table 1. AT89C52 SFR Map and Reset Values
4
0E8H
0E0H
0D8H
0D0H
0C8H
0C0H
0B8H
0B0H
0A8H
0A0H
0F8H
0F0H
98H
90H
88H
80H
XX000000
00000000
00000000
00000000
00000000
11111111
0X000000
11111111
00000000
11111111
00000000
11111111
T2CON
SCON
TCON
PSW
ACC
P3
P2
P1
P0
IP
IE
B
XXXXXXXX
XXXXXX00
00000000
00000111
AT89C52
T2MOD
TMOD
SBUF
SP
00000000
00000000
00000000
RCAP2L
DPL
TL0
00000000
00000000
00000000
RCAP2H
DPH
TL1
EA/VPP
External Access Enable. EA must be strapped to GND in
order to enable the device to fetch code from external pro-
gram memory locations starting at 0000H up to FFFFH.
Note, however, that if lock bit 1 is programmed, EA will be
internally latched on reset.
EA should be strapped to V
executions.
This pin also receives the 12-volt programming enable volt-
age (V
programming is selected.
XTAL1
Input to the inverting oscillator amplifier and input to the
internal clock operating circuit.
XTAL2
Output from the inverting oscillator amplifier.
00000000
00000000
TH0
TL2
P P
) during Flash programming when 12-volt
00000000
00000000
TH2
TH1
C C
for internal program
0XXX0000
PCON
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H