ATMEGA163-8PC Atmel, ATMEGA163-8PC Datasheet - Page 141
![IC AVR MCU 16K A/D 8MHZ 40DIP](/photos/6/70/67049/453-40-dip_sml.jpg)
ATMEGA163-8PC
Manufacturer Part Number
ATMEGA163-8PC
Description
IC AVR MCU 16K A/D 8MHZ 40DIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA163-8AC.pdf
(187 pages)
Specifications of ATMEGA163-8PC
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
4 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Package / Case
40-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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Preventing Flash
Corruption
Assembly code example for a
Boot Loader
1142E–AVR–02/03
• Bit 0 – SPMEN: Store Program Memory Enable
This bit enables the SPM instruction for the next four clock cycles. If set together with
either ASRE, BLBSET, PGWRT, or PGERS, the following SPM instruction will have a
special meaning, see description above. If only SPMEN is set, the following SPM
instruction will store the value in R1:R0 in the temporary page buffer addressed by the
Z-pointer. The LSB of the Z-pointer is ignored. The SPMEN bit will auto-clear upon com-
pletion of an SPM instruction, or if no SPM instruction is executed within four clock
cycles. During Page Erase and Page Write, the SPMEN bit remains high until the oper-
ation is completed.
Writing any other combination than “10001”, “01001”, “00101”, or “00001” in the lower
five bits will have no effect.
During periods of low V
low for the CPU and the Flash to operate properly. These issues are the same as for
board level systems using the Flash, and the same design solutions should be applied.
A Flash corruption can be caused by two situations when the voltage is too low. First, a
regular write sequence to the Flash requires a minimum voltage to operate correctly.
Secondly, the CPU itself can execute instructions incorrectly, if the supply voltage for
executing instructions is too low.
Flash corruption can easily be avoided by following these design recommendations (one
is sufficient):
1. Keep the AVR RESET active (low) during periods of insufficient power supply
2. Keep the AVR core in Power-down sleep mode during periods of low V
voltage. This can be done be enabling the internal Brown-out Detector (BOD) if
the operating voltage matches the detection level. If not, an external low V
Reset Protection circuit can be used. If a Reset occurs while a write operation is
in progress, the write operation will be completed provided that the power supply
voltage is sufficient. The total Reset Time must be longer thatn the Flash write
time. This can be achieved by holding the External Reset, or by selecting a long
Reset Time-out.
will prevent the CPU from attempting to decode and execute instructions, effec-
tively protecting the Flash from unintentional writes.
address)
address)
.equ
not words
.org SMALLBOOTSTART
Write_page:
;- the routine writes one page of data from RAM to Flash
;
;
;- error handling is not included
;- the routine must be placed inside the boot space
;
;
;- registers used: r0, r1, temp1, temp2, looplo, loophi, spmcrval
;
;
;- It is assumed that the interrupts are disabled
; page erase
the first data location in RAM is pointed to by the Y pointer (lowest
the first data location in Flash is pointed to by the Z-pointer (lowest
Only code inside boot loader
section should be read during Self-Programming.
storing and restoring of registers is not included in the routine
register usage can be optimized at the expense of code size
ldi
call
PAGESIZEB = PAGESIZE*2
spmcrval, (1<<PGERS) + (1<<SPMEN)
Do_spm
CC
, the Flash can be corrupted because the supply voltage is too
;PAGESIZEB is page size in BYTES,
ATmega163(L)
CC
. This
CC
141
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