AT90LS4433-4PC Atmel, AT90LS4433-4PC Datasheet - Page 45
![IC MCU 4K FLSH 4MHZ A/D LV 28DIP](/photos/7/21/72189/453-28-dip_sml.jpg)
AT90LS4433-4PC
Manufacturer Part Number
AT90LS4433-4PC
Description
IC MCU 4K FLSH 4MHZ A/D LV 28DIP
Manufacturer
Atmel
Series
AVR® 90LSr
Datasheet
1.AT90S4433-8AC.pdf
(126 pages)
Specifications of AT90LS4433-4PC
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Program Memory Size
4KB (2K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 6 V
Data Converters
A/D 6x10b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
28-DIP (0.300", 7.62mm)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
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EEPROM Read/Write
Access
EEPROM Address Register –
EEAR
EEPROM Data Register –
EEDR
EEPROM Control Register –
EECR
1042H–AVR–04/03
The EEPROM Access Registers are accessible in the I/O space.
The write access time is in the range of 2.5 - 4 ms, depending on the V
self-timing function lets the user software detect when the next byte can be written. A
special EEPROM Ready interrupt can be set to trigger when the EEPROM is ready to
accept new data.
An ongoing EEPROM write operation will complete even if a reset condition occurs.
In order to prevent unintentional EEPROM writes, a two-state write procedure must be
followed. Refer to the description of the EEPROM Control Register for details on this.
When the EEPROM is written, the CPU is halted for two clock cycles before the next
instruction is executed.
When the EEPROM is read, the CPU is halted for four clock cycles before the next
instruction is executed.
The EEPROM Address Register (EEAR) specifies the EEPROM address in the 256
bytes of EEPROM space. The EEPROM data bytes are addressed linearly between 0
and 255. The Initial Value of EEAR is undefined. A proper value must be written before
the EEPROM may be accessed.
• Bits 7..0 – EEDR7.0: EEPROM Data
For the EEPROM write operation, the EEDR Register contains the data to be written to
the EEPROM in the address given by the EEAR Register. For the EEPROM read oper-
ation, the EEDR contains the data read out from the EEPROM at the address given by
EEAR.
• Bits 7..4 – Res: Reserved Bits
These bits are reserved bits in the AT90S4433 and will always read as zero.
Bit
$1E ($3E)
Read/Write
Initial Value
Bit
$1D ($3D)
Read/Write
Initial Value
Bit
$1C ($3C)
Read/Write
Initial Value
EEAR7
MSB
R/W
R/W
R
7
X
7
0
7
–
0
EEAR6
R/W
R/W
X
R
6
6
0
6
–
0
EEAR5
R/W
R/W
X
R
5
5
0
5
–
0
EEAR4
R/W
R/W
R
4
X
4
0
4
–
0
EEAR3
EERIE
R/W
R/W
R/W
X
3
3
0
3
0
EEMWE
EEAR2
R/W
R/W
R/W
X
2
2
0
2
0
AT90S/LS4433
EEAR1
EEWE
R/W
R/W
R/W
1
X
1
0
1
0
EEAR0
EERE
R/W
LSB
R/W
R/W
CC
0
X
0
0
0
0
voltages. A
EEAR
EEDR
EECR
45
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