PIC18C452T-I/L Microchip Technology, PIC18C452T-I/L Datasheet - Page 89
![IC MCU OTP 16KX16 A/D 44PLCC](/photos/6/63/66325/150-44-plcc_sml.jpg)
PIC18C452T-I/L
Manufacturer Part Number
PIC18C452T-I/L
Description
IC MCU OTP 16KX16 A/D 44PLCC
Manufacturer
Microchip Technology
Series
PIC® 18Cr
Datasheets
1.PIC16F616T-ISL.pdf
(8 pages)
2.PIC16C770-ISO.pdf
(8 pages)
3.PIC18C242-ISO.pdf
(305 pages)
4.PIC18C242-ISO.pdf
(12 pages)
Specifications of PIC18C452T-I/L
Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
33
Program Memory Size
32KB (16K x 16)
Program Memory Type
OTP
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-PLCC
Processor Series
PIC18C
Core
PIC
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
MSSP, SPI, I2C, PSP, USART
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
34
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Development Tools By Supplier
ICE2000, DM163022, DV164136
Minimum Operating Temperature
- 40 C
On-chip Adc
8
For Use With
I3DB18C452 - BOARD DAUGHTER ICEPIC3DVA16XL441 - ADAPTER DEVICE ICE 44PLCC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC18C452T-I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
- PIC16F616T-ISL PDF datasheet
- PIC16C770-ISO PDF datasheet #2
- PIC18C242-ISO PDF datasheet #3
- PIC18C242-ISO PDF datasheet #4
- Current page: 89 of 305
- Download datasheet (6Mb)
8.5
This section is only applicable to the PIC18C4X2
devices.
PORTE is a 3-bit wide, bi-directional port. The corre-
sponding Data Direction register is TRISE. Setting a
TRISE bit (= 1) will make the corresponding PORTE pin
an input (i.e., put the corresponding output driver in a
Hi-Impedance mode). Clearing a TRISE bit (= 0) will
make the corresponding PORTE pin an output (i.e., put
the contents of the output latch on the selected pin).
The Data Latch register (LATE) is also memory
mapped. Read-modify-write operations on the LATE
register reads and writes the latched output value for
PORTE.
PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7), which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
Register 8-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected as an analog input, these pins will read as ’0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
EXAMPLE 8-5:
CLRF
CLRF
MOVLW
MOVWF
MOVLW
MOVWF
Note:
Note:
2001 Microchip Technology Inc.
PORTE, TRISE and LATE
Registers
PORTE
LATE
0x07
ADCON1
0x03
TRISC
On a Power-on Reset, these pins are con-
figured as digital inputs.
On a Power-on Reset, these pins are con-
figured as analog inputs.
; Initialize PORTE by
; clearing output
; data latches
; Alternate method
; to clear output
; data latches
; Configure A/D
; for digital inputs
; Value used to
; initialize data
; direction
; Set RE<0> as inputs
; RE<1> as outputs
; RE<2> as inputs
INITIALIZING PORTE
FIGURE 8-9:
WR LATE
or
PORTE
WR TRISE
Note 1: I/O pins have diode protection to V
Data
Bus
RD PORTE
To Analog Converter
TRIS Latch
Data Latch
D
D
CK
CK
RD LATE
RD TRISE
Q
Q
PORTE BLOCK DIAGRAM
IN I/O PORT MODE
PIC18CXX2
Q
EN
EN
D
Schmitt
Trigger
Input
Buffer
DS39026C-page 87
DD
and V
SS
I/O pin
.
(1)
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